INTEGRATED CIRCUITS HAVING FINFET SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME TO RESIST SUB-FIN CURRENT LEAKAGE
First Claim
1. A method of fabricating an integrated circuit having a FinFET, wherein the method comprises:
- providing a substrate comprising fins, wherein the fins comprise semiconductor material;
forming a first metal oxide layer over sidewall surfaces of the fins, wherein the first metal oxide layer comprises a first metal oxide;
recessing the first metal oxide layer to a depth below a top surface of the fins to form a recessed first metal oxide layer, wherein the top surface and sidewall surfaces of the fins at a top portion thereof are free from the first metal oxide layer; and
forming a gate electrode structure over the top surface and sidewall surfaces of the fins at the top portion thereof, wherein the recessed first metal oxide layer is recessed beneath the gate electrode structure.
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Accused Products
Abstract
Integrated circuits that have a FinFET and methods of fabricating the integrated circuits are provided herein. In an embodiment, a method of fabricating an integrated circuit having a FinFET includes providing a substrate comprising fins. The fins include semiconductor material. A first metal oxide layer is formed over sidewall surfaces of the fins. The first metal oxide layer includes a first metal oxide. The first metal oxide layer is recessed to a depth below a top surface of the fins to form a recessed first metal oxide layer. The top surface and sidewall surfaces of the fins at a top portion of the fins are free from the first metal oxide layer. A gate electrode structure is formed over the top surface and sidewall surfaces of the fins at the top portion of the fins. The recessed first metal oxide layer is recessed beneath the gate electrode structure.
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Citations
20 Claims
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1. A method of fabricating an integrated circuit having a FinFET, wherein the method comprises:
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providing a substrate comprising fins, wherein the fins comprise semiconductor material; forming a first metal oxide layer over sidewall surfaces of the fins, wherein the first metal oxide layer comprises a first metal oxide; recessing the first metal oxide layer to a depth below a top surface of the fins to form a recessed first metal oxide layer, wherein the top surface and sidewall surfaces of the fins at a top portion thereof are free from the first metal oxide layer; and forming a gate electrode structure over the top surface and sidewall surfaces of the fins at the top portion thereof, wherein the recessed first metal oxide layer is recessed beneath the gate electrode structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method of fabricating an integrated circuit having a FinFET, wherein the method comprises:
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providing a substrate comprising fins, wherein the fins comprise semiconductor material; forming a first metal oxide layer over sidewall surfaces of the fins, wherein the first metal oxide layer comprises a first metal oxide; selectively masking a first fin after forming the first metal oxide layer, wherein a second fin remains exposed after selectively masking the first fin; forming a second metal oxide layer over the first metal oxide layer on the second fin, wherein the second metal oxide layer comprises a second metal oxide different from the first metal oxide; depositing a dielectric material different from the first metal oxide and the second metal oxide over the first metal oxide layer and the second metal oxide layer, where present, to form a dielectric layer; recessing the first metal oxide layer and the second metal oxide layer, after depositing the dielectric material, with an etchant that is selective to the first metal oxide and the second metal oxide over the dielectric material to a depth below a top surface of the fins to form a recessed first metal oxide layer and a recessed second metal oxide layer, wherein the top surface and sidewall surfaces of the fins at a top portion thereof are free from the first metal oxide layer and the second metal oxide layer; removing a portion of the dielectric layer to a depth of at least a depth of the recessed first metal oxide layer to form a recessed dielectric layer; depositing additional dielectric material over the recessed first metal oxide layer and over the recessed dielectric layer to form a reformed dielectric layer; recessing the reformed dielectric layer to a depth above the recessed first metal oxide layer; and forming a gate electrode structure over the top surface and sidewall surfaces of the fins at the top portion thereof, wherein the recessed first metal oxide layer and the recessed second metal oxide layer are recessed beneath the gate electrode structure.
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17. An integrated circuit having a FinFET, wherein the integrated circuit comprises:
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a substrate comprising fins, wherein the fins comprise semiconductor material; a recessed first metal oxide layer disposed over sidewall surfaces of the fins, wherein the recessed first metal oxide layer comprises a first metal oxide and wherein the recessed first metal oxide layer is recessed to a depth below a top surface of the fins with the top surface and sidewall surfaces of the fins at a top portion thereof free from the recessed first metal oxide layer; and a gate electrode structure disposed over the top surface and sidewall surfaces of the fins at the top portion thereof, wherein the recessed first metal oxide layer is recessed beneath the gate electrode structure. - View Dependent Claims (18, 19, 20)
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Specification