INSTRUCTION FOR PERFORMING A PSEUDORANDOM NUMBER GENERATE OPERATION

• US 20150049870A1
• Filed: 10/21/2014
• Published: 02/19/2015
• Est. Priority Date: 03/14/2013
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Greiner, Dan F., Nerz, Bernd, Visegrady, Tamas
• Granted Patent: US 9,252,953 B2
• Time in Patent Office: Days
• US Class Current: 380/46
• CPC Class Codes: G06F 7/58 Random or pseudo-random number generators
• CPC Class Codes: G06F 7/582 Pseudo-random number generators
• CPC Class Codes: G06F 9/3001 Arithmetic instructions
• CPC Class Codes: G06F 9/30018 Bit or string instructions
• CPC Class Codes: G06F 9/30181 Instruction operation extension or modification
• CPC Class Codes: H04L 2209/24 Key scheduling, i.e. generating round keys or sub-keys for block encryption
• CPC Class Codes: H04L 9/0643 Hash functions, e.g. MD5, SHA, HMAC or f9 MAC
• CPC Class Codes: H04L 9/0662 with particular pseudorandom sequence generator
• CPC Class Codes: H04L 9/0869 involving random numbers or seeds

Abstract

A machine instruction is provided that includes an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation, and a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used. The machine instruction is executed, and execution includes for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.

Claims

1. A computer program product for executing a machine instruction, the computer program product comprising:

a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;

obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation; and

a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used by the machine instruction; and

executing the machine instruction, the executing comprising;

obtaining a modifier (M) field associated with the machine instruction;

based on the M field having a first value, performing a deterministic pseudorandom number generate operation, the deterministic pseudorandom number generate operation comprising;

for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and

storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.

2. The computer program product of claim 1, wherein the machine instruction further comprises another register field to be used to identify another register, the another register to specify a location in memory of a second operand to be used by the machine instruction, and wherein the method further comprises:

executing the machine instruction another time, the executing the machine instruction another time comprising;

based on the M field having a second value, performing a deterministic pseudorandom number seed operation, the deterministic pseudorandom number seed operation comprising;

obtaining seed material based on information included in the second operand;

using the 512 bit secure hash technique and the seed material to provide one or more seed values; and

storing the one or more seed values in the parameter block associated with the machine instruction.

3. The computer program product of claim 1, wherein the executing further comprises obtaining a function code associated with the machine instruction, the function code to specify a function to be performed, and based on the function code being a particular value, obtaining the modifier field.

4. The computer program product of claim 1, wherein the parameter block is configured to include a reseed counter to indicate a number of times the machine instruction has completed with a specific condition code since the parameter block was last instantiated or reseeded;

a stream bytes field to track a number of bytes stored based on the generate operation;

a value to indicate an internal state of a random number generator represented by the parameter block; and

a constant value to be initialized by execution of a seed operation.

5. The computer program product of claim 1, wherein the storing comprises storing right to left in the first operand.

6. The computer program product of claim 1, wherein for a block of memory of the one or more blocks of memory, the generating the generated hash value comprises:

adding a seed value of the at least one seed value of the parameter block and a block number of the block of memory being processed to provide a sum;

combining the sum with padding to provide input; and

using the input and the 512 bit secure hash technique to provide the generated hash value.

7. The computer program product of claim 6, wherein the generating comprises generating the generated hash value for a number of blocks of memory, the number of blocks of memory determined based on a length of the first operand, and starting with a rightmost block of memory.

8. The computer program product of claim 1, wherein the storing for one generated hash value comprises:

determining whether a length of the first operand as indicated in a selected register of the machine instruction is a multiple of a defined number;

based on the length being a multiple of the defined number, storing the one generated hash value in the corresponding block of memory of the first operand; and

based on the length not being a multiple of the defined number, storing a portion of the one generated hash value in the corresponding block of memory of the first operand.

9. The computer program product of claim 8, wherein the portion comprises a leftmost number of bytes of the one generated hash value.

10. The computer program product of claim 8, wherein the method further comprises:

based on the storing, adjusting the length of the first operand based on a number of bytes stored in the first operand; and

updating a stream bytes field of the parameter block based on a number of bytes stored in the first operand.

11. A computer system for executing a machine instruction, the computer system comprising:

a memory; and

a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising;

obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation; and

a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used by the machine instruction; and

executing the machine instruction, the executing comprising;

obtaining a modifier (M) field associated with the machine instruction;

based on the M field having a first value, performing a deterministic pseudorandom number generate operation, the deterministic pseudorandom number generate operation comprising;

for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and

storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.

12. The computer system of claim 11, wherein the machine instruction further comprises another register field to be used to identify another register, the another register to specify a location in memory of a second operand to be used by the machine instruction, and wherein the method further comprises:

executing the machine instruction another time, the executing the machine instruction another time comprising;

based on the M field having a second value, performing a deterministic pseudorandom number seed operation, the deterministic pseudorandom number seed operation comprising;

obtaining seed material based on information included in the second operand;

using the 512 bit secure hash technique and the seed material to provide one or more seed values; and

storing the one or more seed values in the parameter block associated with the machine instruction.

13. The computer system of claim 11, wherein the executing further comprises obtaining a function code associated with the machine instruction, the function code to specify a function to be performed, and based on the function code being a particular value, obtaining the modifier field.

14. The computer system of claim 11, wherein the storing comprises storing right to left in the first operand.

15. The computer system of claim 11, wherein for a block of memory of the one or more blocks of memory, the generating the generated hash value comprises:

adding a seed value of the at least one seed value of the parameter block and a block number of the block of memory being processed to provide a sum;

combining the sum with padding to provide input; and

using the input and the 512 bit secure hash technique to provide the generated hash value.

16. The computer system of claim 11, wherein the storing for one generated hash value comprises:

determining whether a length of the first operand as indicated in a selected register of the machine instruction is a multiple of a defined number;

based on the length being a multiple of the defined number, storing the one generated hash value in the corresponding block of memory of the first operand; and

based on the length not being a multiple of the defined number, storing a portion of the one generated hash value in the corresponding block of memory of the first operand.

17. The computer system of claim 16, wherein the method further comprises:

based on the storing, adjusting the length of the first operand based on a number of bytes stored in the first operand; and

updating a stream bytes field of the parameter block based on a number of bytes stored in the first operand.

18. A method of executing a machine instruction, the method comprising:

obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation; and

a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used by the machine instruction; and

executing the machine instruction, the executing comprising;

obtaining a modifier (M) field associated with the machine instruction;

based on the M field having a first value, performing a deterministic pseudorandom number generate operation, the deterministic pseudorandom number generate operation comprising;

for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and

storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.

19. The method of claim 18, wherein the machine instruction further comprises another register field to be used to identify another register, the another register to specify a location in memory of a second operand to be used by the machine instruction, and wherein the method further comprises:

executing the machine instruction another time, the executing the machine instruction another time comprising;

based on the M field having a second value, performing a deterministic pseudorandom number seed operation, the deterministic pseudorandom number seed operation comprising;

obtaining seed material based on information included in the second operand;

using the 512 bit secure hash technique and the seed material to provide one or more seed values; and

storing the one or more seed values in the parameter block associated with the machine instruction.

20. The method of claim 18, wherein for a block of memory of the one or more blocks of memory, the generating the generated hash value comprises:

adding a seed value of the at least one seed value of the parameter block and a block number of the block of memory being processed to provide a sum;

combining the sum with padding to provide input; and

using the input and the 512 bit secure hash technique to provide the generated hash value.