ACCELERATED RELAXATION OF STRAIN-RELAXED EPITAXIAL BUFFERS BY USE OF INTEGRATED OR STAND-ALONE THERMAL PROCESSING

• US 20150050753A1
• Filed: 08/15/2014
• Published: 02/19/2015
• Est. Priority Date: 08/16/2013
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: SRINIVASAN, Swaminathan T., CARLSON, David K., NOORI, Atif M.
• Granted Patent: US 9,443,728 B2
• Time in Patent Office: Days
• US Class Current: 438/5
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02439 Materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02538 Group 13/15 materials
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/3245 of AIIIBV compounds
• CPC Class Codes: H01L 21/67011 Apparatus for manufacture or treatment processes H01L21/30, H01L21/46; for production or after-treatment of single crystals or homogeneous polycrystalline material C30B35/00
• CPC Class Codes: H01L 21/67098 Apparatus for thermal treatment
• CPC Class Codes: H01L 21/67115 mainly by radiation
• CPC Class Codes: H01L 21/6719 characterized by the construction of the processing chambers, e.g. modular processing chambers
• CPC Class Codes: H01L 21/67207 comprising a chamber adapted to a particular process
• CPC Class Codes: H01L 21/67248 Temperature monitoring

Abstract

Implementations of the present disclosure generally relate to methods and apparatus for forming a film on a substrate. More particularly, implementations of the present disclosure relate to methods and apparatus for heteroepitaxial growth of crystalline films. In one implementation, a method of heteroepitaxial deposition of a strain relaxed buffer (SRB) layer on a substrate is provided. The method comprises epitaxially depositing a buffer layer over a dissimilar substrate, rapidly heating the buffer layer to relax the buffer layer, rapidly cooling the buffer layer and determining whether the buffer layer has achieved a desired thickness.

Claims

1. A method of heteroepitaxial deposition of a strain relaxed buffer (SRB) layer on a substrate, comprising:

epitaxially depositing a buffer layer over a dissimilar substrate;

rapidly heating the buffer layer to relax the buffer layer;

rapidly cooling the buffer layer; and

determining whether the buffer layer has achieved a desired thickness.

2. The method of claim 1, further comprising repeating the epitaxially depositing, the rapidly heating and the rapidly cooling until the buffer layer achieves a desired thickness.

3. The method of claim 1, further comprising depositing active material over the buffer layer.

4. The method of claim 1, wherein the buffer layer comprises a Group III-V material or a Group IV material.

5. The method of claim 1, wherein the buffer layer is a binary, ternary, or quaternary film.

6. The method of claim 1, wherein the buffer layer is a material selected from the group consisting of:

GaN, AlN, AlGaN, InGaN, InAlGaN, GaAs, InAlAs, Si, Ge, C, Sn, SiGe, SiC, GaSh, AlSb, GaP, AlP, InP, InSb, ZnO, WSe₂, MoSe₂ and combinations thereof.

7. The method of claim 6, wherein the substrate is a material selected from the group consisting of:

sapphire (Al₂O₃), silicon (Si) (doped and undoped), silicon carbide (SiC), spinel, zinc oxide, gallium-arsenide (GaAs), lithium gallate, indium phosphide (InP), single-crystal GaN, aluminum nitride (AlN), GdScO₃ (GSO), MoSe₂, Ge₂Sb₂Te₅ (GST), and combinations thereof.

8. The method of claim 1, wherein the epitaxially depositing a buffer layer, rapidly heating the buffer layer, rapidly cooling the buffer layer, occur in the same processing chamber.

9. The method of claim 1, wherein the epitaxially depositing a buffer and rapidly heating the buffer layer occur in separate processing chambers.

10. A method of forming a heteroepitaxial film on a substrate in an integrated processing system, comprising:

epitaxially depositing a buffer layer over a dissimilar substrate in a first processing chamber of an integrated processing system;

removing the substrate from the first processing chamber without exposing the substrate to atmosphere;

transferring the substrate to a second processing chamber of the integrated processing system; and

annealing the buffer layer in the second processing chamber.

11. The method of claim 10, further comprising:

transferring the substrate back to the first processing chamber;

epitaxially depositing an additional portion of the buffer layer over the buffer layer;

removing the substrate from the first processing chamber without exposing the substrate to atmosphere;

transferring the substrate to the second processing chamber of the integrated processing system; and

annealing the buffer layer in the second processing chamber.

12. The method of claim 10, further comprising:

removing the substrate from the second processing chamber without exposing the substrate to atmosphere;

transferring the substrate to a third processing chamber of the integrated processing system; and

depositing an active material layer over the buffer layer.

13. The method of claim 10, wherein the second processing chamber is selected from the group of:

a millisecond annealing chamber, a nanosecond annealing chamber, a spike anneal chamber and a soak anneal chamber.

14. The method of claim 10, wherein the second processing chamber is configured for overhead heating of the buffer layer.

15. A method of forming a heteroepitaxial film on a substrate in an integrated processing system, comprising:

epitaxially depositing a buffer layer over a dissimilar substrate in a first processing chamber of an integrated processing system;

removing the substrate from the integrated processing system;

transferring the substrate to a second processing chamber positioned ex-situ to the integrated processing system; and

annealing the buffer layer in the second processing chamber.

16. The method of claim 15, further comprising:

transferring the substrate into a pre-clean chamber positioned in the integrated processing system;

cleaning the buffer layer;

removing the substrate from the pre-clean chamber without exposing the substrate to atmosphere; and

epitaxially depositing an additional portion of the buffer layer over the buffer layer in the first processing chamber.

17. The method of claim 16, further comprising:

removing the substrate from the first processing chamber without exposing the substrate to atmosphere; and

transferring the substrate to the second processing chamber; and

annealing the buffer layer in the second processing chamber.

18. The method of claim 15, further comprising:

removing the substrate from the second processing chamber;

transferring the substrate to a third processing chamber of the integrated processing system; and

depositing an active material layer over the buffer layer.

19. The method of claim 15, wherein the second processing chamber is a millisecond annealing chamber, a nanosecond annealing chamber, a spike anneal chamber and a soak anneal chamber.

20. The method of claim 15, wherein the second processing chamber is configured for overhead heating of the buffer layer.