Apparatus and Method for Microprocessor File System Protection

• US 20150052390A1
• Filed: 08/13/2013
• Published: 02/19/2015
• Est. Priority Date: 08/13/2013
• Status: Abandoned Application

• Current Assignee: Breakaway Systems
• Original Assignee: Breakaway Systems
• Inventors: DRYER, JOSEPH ERNEST, LAMBERT, JOHN DAVID, LAMBERT, IAN JAMES
• Application Number:
  US13/966,043
• Publication Number:
  US 20150052390A1
• Time in Patent Office: Days
• US Class Current: 714/14
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24
• CPC Class Codes: G06F 11/1438 Restarting or rejuvenating
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30

Abstract

A system for providing protection to a processor system from the problems associated with power failures in the middle of processor operations is described. On detection of a power failure in the main power source, the processor power is maintained by means of a short-term secondary power source. Either immediately or after a momentary pause to override glitches, if power remains off the processor is notified that power will soon be removed and that an orderly shutdown is to take place. Once the protected system has completed its orderly shutdown, or after a length of time indicating that the orderly shutdown is improbable, power is removed from the system for a defined period and the system removes power from the protected processor system for at least a defined period of time, providing an assured hard restart. When external power is restored a normal running state is resumed after any power up sequencing. The orderly shutdown and hard reset can take place by command from the protected processor or system. A state machine is used to sequence the states in this process and control the transitions between states.

Claims

1. A method of protecting a processor system by the use of a state machine to control a the shutting down of power and the restoration of power comprising the steps of:

a. providing a means for supplying a backup power source, and

b. providing a means for selectively supplying power to said protected processor system from said backup power source, from the normal external power source, from both power sources, or from neither, and

c. providing a means for determining that external power to a protected processor is failed, failing or is about to fail, and

d. providing a means for shutdown signaling to said protected processor that shutdown is imminent on said indication that the external power is failed, failing or about to fail to allow said processor to begin an orderly shutdown, and

e. providing provision within the code of said protected processor for conducting an orderly shutdown of said protected processor, and

f. providing a means for receiving from said protected processor an indication that said orderly shutdown is complete after said shutdown signaling, and

g. providing a means for removing power from said protected processor on receipt of said indication that said orderly shutdown is complete or that a predetermined time has elapsed after said shutdown signaling without said indication that said orderly shutdown is complete, and

h. providing a means after said removing power from said protected processor for a fixed time for determining that said external power has been restored, and

i. providing a means for orderly restoring power to said protected processor after said determination that said external power has been restored,

whereby said protected processor is protected against unsafe operation.

2. The method of protecting a processor system of claim 1 wherein said providing a means for selectively supplying power to said protected processor system from said backup power source comprises a means for maintaining a minimum voltage at said protected processor system in a manner that can be turned off and providing a means whereby power is not drawn from said backup power source when said normal external power source is operating.

3. The method of protecting a processor system of claim 1 wherein said providing a means for selectively supplying power to said protected processor system from said backup power source, from the normal external power source, from both power sources, or from neither comprises providing a switch between either said power source and said protected processor system power.

4. The method of protecting a processor of claim 1 further including providing a means for simulating said indication that the external power is failing in response to a request signal from said protected processor system or other source in order to provide a hard reset to said protected processor system.

5. The method of protecting a processor of claim 1 wherein said backup power source includes a battery or a charged capacitor together with a voltage regulator.

6. The method of protecting a processor of claim 1 further including providing a means for monitoring a watchdog signal from said protected processor and responding to the failure to timely receive said watchdog signal in the same manner as if there were an indication that the external power is failed, failing or about to fail.

7. The method of protecting a processor of claim 1 wherein said indication that the external power is failed, failing or is about to fail includes a delay between first detection of such indication and declaration of said indication so that there is no declaration of said indication in the event that external power is restored during said delay.

8. The method of protecting a processor of claim 1 wherein said providing a means for orderly restoring power to said protected processor comprises the application of power to said protected processor system while said protected system is held in reset and after a delay releasing said reset while maintaining power.

9. A machine for protecting a processor system comprising:

a. a normal protected processor system power supply with a means for disconnecting said normal power supply from said protected processor system, and

b. a backup power supply capable of maintaining a switchable power to said protected processor system in a manner such that said backup power source is not drained while said normal protected processor system power supply is operating in a normal fashion, and

c. a power supply monitor capable of determining if said normal protected system power supply power is failed, failing or about to fail, and

d. a state machine with at least the following states and state transitions;

i. a startup state where said normal protected processor system power supply and said backup power supply are turned on in a controlled manner after which the running state is entered, and

ii. a running state where said normal protected processor system power supply and said backup power supply are on, and transitioning to the shutdown state occurs when said monitor of said protected system power supply determines said protected system power supply power is failed, failing or about to fail, and

iii. a shutdown state where at least the following steps are taken;

1. said backup power supply remains on, and

2. an irreversible shutdown handshaking sequence between said state machine and said protected processor system is initiated comprising the following steps;

a. said state machine signals said protected processor that a power shutdown is imminent, and

b. after an orderly shutdown said protected processor signals said state machine that said protected processor has completed an orderly shutdown, and

c. after receipt of said signal that said protected processor has completed an orderly shutdown, or a defined period has passed from said state machine signaling said protected processor that a power shutdown is imminent the state machine turns off both said normal protected processor system power supply and said backup power supply, and after a predetermined time the state machine transitions to the powerdown state, and

iv. a powerdown state where both said normal protected processor system power supply and said backup power supply are off and the state machine monitors said protected system power supply monitor to determine that said protected system power supply is no longer failed or failing, in which case said state machine transitions to said startup state, whereby said protected processor is protected against premature shutdown.

10. The machine for protecting a processor system of claim 9 wherein the backup power supply capable of maintaining a switchable power to said protected processor system comprises a power source combined with a switch or a switchable regulator.

11. The method of protecting a processor system of claim 9 wherein said protected processor system power supply with a means for disconnecting said normal power supply from said protected processor system comprises a switch or switchable regulator between a power supply and said protected processor system.

12. The method of protecting a processor system of claim 9 further including an input signal to said state machine to trigger a transition from said running state to said shutdown state to allow forcing a hard reset from the running state.

13. The backup power source of claim 9 wherein said backup power source includes a battery, a charged capacitor or a voltage regulator.

14. The running state of claim 9 further including monitoring a watchdog signal from said protected processor during said running state and responding to the failure to timely receive said watchdog signal in a timely manner by transitioning from said running state to said shutdown state.

15. The running state of claim 9 further including a delay before transition to said shutdown state caused by said power supply monitor indicating failure of monitored power and aborting said transition if said power supply monitor indicates restoration of monitored power during said delay.