Method for Laterally Trimming a Hardmask

• US 20150064918A1
• Filed: 08/21/2014
• Published: 03/05/2015
• Est. Priority Date: 08/27/2013
• Status: Active Grant

• Current Assignee: Tokyo Electron Limited
• Original Assignee: Tokyo Electron Limited
• Inventors: Ranjan, Alok, Voronin, Sergey
• Granted Patent: US 9,779,952 B2
• Time in Patent Office: Days
• US Class Current: 438/710
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/308 using masks H01L21/3063, H01L21/3065 take precedence
• CPC Class Codes: H01L 21/3086 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/31116 by dry-etching

Abstract

Techniques herein include methods for controllable lateral etching of dielectrics in polymerizing fluorocarbon plasmas. Methods can include dielectric stack etching that uses a mask trimming step as part of a silicon etching process. Using a fluorocarbon mixture for dielectric mask trimming provides several advantages, such as being straightforward to apply and providing additional flexibility to the process flow. Thus, techniques herein provide a method to correct or tune CDs on a hardmask. In general, this technique can include using a fluorine-based and a fluorocarbon-based, or fluorohydrocarbon-based, chemistry for creating a plasma, and controlling a ratio of the two chemistries. Without the hardmask trim method disclosed herein, if a hardmask CD is not on target, then a wafer is scrapped. With hard-mask trim capability in silicon etch as disclosed herein, a given CD can be re-targeted to eliminate wafer-scraps.

Claims

1. A method for etching features on a substrate, the method comprising:

disposing a substrate on a substrate holder in a plasma processing system, the substrate having a patterned hardmask defining openings that expose an underlying substrate, the patterned hardmask having features with a critical dimension (CD) greater than a predetermined specified critical dimension of target features;

flowing an etching process gas into the plasma processing system, the etching process gas comprising a fluorine-containing gas;

flowing a passivating process gas into the plasma processing system, the passivating process gas comprising a fluorocarbon;

forming plasma from the etching process gas and the passivating process gas such that the substrate is exposed to the plasma; and

laterally etching sidewalls of the hardmask using products of the plasma by controlling a ratio of etching process gas to passivating process gas, and by controlling electrode bias in the plasma processing system.

2. The method of claim 1, wherein the underlying substrate is a silicon substrate, and wherein the passivating process gas includes a diatomic molecular gas selected from the group consisting of N2 and H2.

3. The method of claim 1, wherein controlling the ratio of etching process gas to passivating process gas comprises maintaining the ratio between 0.10 and 10.0.

4. The method of claim 3, wherein controlling the ratio of etching process gas to passivating process gas comprises maintaining the ratio between 2.5 and 5.0.

5. The method of claim 1, wherein controlling electrode bias includes controlling electrode bias such that there is isotropic movement of products from the plasma.

6. The method of claim 1, wherein controlling electrode bias includes causing a first portion of products from the plasma to anisotropically strike the substrate, and a remaining portion of products from the plasma to isotropically strike the substrate.

7. The method of claim 1, wherein controlling electrode bias includes maintaining a fully isotropic plasma product exposure to the substrate.

8. The method of claim 1, wherein disposing the substrate on the substrate holder includes the substrate having a patterned silicon-containing layer on top of the patterned hardmask.

9. The method of claim 1, wherein disposing the substrate on the substrate holder includes the patterned hardmask including two or more layers.

10. The method of claim 9, wherein the two or more layers of the patterned hardmask include silicon oxide and silicon nitride.

11. The method of claim 1, wherein disposing the substrate on the substrate holder includes the patterned hardmask selected from a dielectric material.

12. The method of claim 11, wherein disposing the substrate on the substrate holder includes the patterned hardmask being a material selected from the group consisting of silicon nitride and silicon oxide.

13. The method of claim 1, wherein flowing the etching process gas includes flowing a gas selected from the group consisting of SF6, NF3, CF4, and XeF2.

14. The method of claim 1, wherein flowing the passivating process gas includes flowing a gas selected from the group consisting of CH2F2, CF4, CHF3, CH3F, C2F4, C4F8, C4F6, C5HF7, and C5F8.

15. The method of claim 1, further comprising, flowing a diluent process gas into the plasma processing system.

16. The method of claim 15, wherein flowing the diluent process gas includes flowing N2, Argon, and Helium.

17. The method of claim 1, wherein laterally etching sidewalls includes laterally etching a predetermined amount such that the critical dimension of the features on the patterned hardmask is reduced to within the predetermined specified critical dimensions of the features.

18. The method of claim 1, wherein laterally etching sidewalls includes reducing feature thickness by about 0.3 to 30 nanometers.

19. The method of claim 18, wherein laterally etching sidewalls includes reducing feature thickness by about 5 to 15 nanometers.

20. The method of claim 1, wherein disposing the substrate on the substrate holder is in response to identifying, via scanning electron microscope, that the critical dimension of the patterned hard mask features is greater than the predetermined specified critical dimension of target features.