DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
First Claim
1. A display apparatus comprising:
- a backplane panel comprising;
a substrate on which are defined a transistor area and a wiring area;
a thin film transistor in the transistor area of the substrate, and comprising a gate electrode, an active layer, a source electrode and a drain electrode;
an etch prevention layer which is in the transistor area and absent in the wiring area, and covers the active layer, and first and second contact holes defined in the etch prevention layer in the transistor area and through which the active layer is electrically coupled to the source electrode and the drain electrode, respectively;
a first wiring layer in the wiring area of the substrate;
a first insulating layer which is on the substrate and covers the gate electrode and the first wiring layer, and a third contact hole which is defined in the first insulating layer in the wiring area and exposes the first wiring layer; and
a second wiring layer which is on the first insulating layer and in the wiring area of the substrate, and electrically coupled to the first wiring layer via the third contact hole.
1 Assignment
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Accused Products
Abstract
A display apparatus includes: a substrate defining transistor and wiring areas; a thin film transistor in the transistor area and including a gate electrode, an active layer, and source and drain electrodes; an etch prevention layer in the transistor area, absent in the wiring area and covering the active layer, and first and second contact holes defined in the etch prevention layer and through which the active layer is electrically coupled to the source and drain electrodes; a first wiring layer in the wiring area; a first insulating layer which covers the gate electrode and the first wiring layer, and a third contact hole defined in the first insulating layer in the wiring area and exposing the first wiring layer; and a second wiring layer on the first insulating layer and in the wiring area, and electrically coupled to the first wiring layer via the third contact hole.
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Citations
21 Claims
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1. A display apparatus comprising:
a backplane panel comprising; a substrate on which are defined a transistor area and a wiring area; a thin film transistor in the transistor area of the substrate, and comprising a gate electrode, an active layer, a source electrode and a drain electrode; an etch prevention layer which is in the transistor area and absent in the wiring area, and covers the active layer, and first and second contact holes defined in the etch prevention layer in the transistor area and through which the active layer is electrically coupled to the source electrode and the drain electrode, respectively; a first wiring layer in the wiring area of the substrate; a first insulating layer which is on the substrate and covers the gate electrode and the first wiring layer, and a third contact hole which is defined in the first insulating layer in the wiring area and exposes the first wiring layer; and a second wiring layer which is on the first insulating layer and in the wiring area of the substrate, and electrically coupled to the first wiring layer via the third contact hole. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of manufacturing a display apparatus comprising:
providing a backplane panel, comprising; forming a first wiring layer in a wiring area of a substrate; forming a gate electrode in a transistor area of the substrate; forming a first insulating layer, a semiconductor layer and an etch prevention material layer to cover the gate electrode and the first wiring layer; etching the semiconductor layer and the etch prevention material layer in the wiring area, to form an active layer and an etch prevention layer on the gate electrode in the transistor area; simultaneously forming first and second contact holes in the etch prevention layer in the transistor area by patterning the etch prevention layer on the gate electrode, and a third contact hole in the first insulating layer in the wiring area by patterning the first insulating layer on the first wiring layer; and forming a source electrode and a drain electrode in the transistor area, and a second wiring layer in the wiring area, by forming and patterning a metal layer. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21)
Specification