SYSTEMS AND METHODS FOR SIMILARITY-BASED SEMICONDUCTOR PROCESS CONTROL

• US 20150079700A1
• Filed: 09/13/2013
• Published: 03/19/2015
• Est. Priority Date: 09/13/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Ke, Chih-Ming, Kao, Ching-Pin, Chang, Yang-Hung, Chen, Kai-Hsiung, Hu, Chun-Ming
• Granted Patent: US 9,070,622 B2
• Time in Patent Office: Days
• US Class Current: 438/5
• CPC Class Codes: G03F 1/36 Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
• CPC Class Codes: G03F 1/68 Preparation processes not covered by groups G03F1/20 - G03F1/50
• CPC Class Codes: G03F 1/70 Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
• CPC Class Codes: G03F 7/70508 Data handling in all parts of the microlithographic apparatus, e.g. handling pattern data for addressable masks or data transfer to or from different components within the exposure apparatus
• CPC Class Codes: G03F 7/70525 Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure
• CPC Class Codes: G03F 7/70633 Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
• CPC Class Codes: G05B 13/042 in which a parameter or coefficient is automatically adjusted to optimise the performance
• CPC Class Codes: G05B 19/41835 characterised by programme execution
• CPC Class Codes: G05B 2219/45029 Mount and solder parts on board
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

The present disclosure provides methods and systems for providing a similarity index in semiconductor process control. One of the methods disclosed herein is a method for semiconductor fabrication process control. The method includes steps of receiving a first semiconductor device wafer and receiving a second semiconductor device wafer. The method also includes a step of collecting metrology data from the first and second semiconductor device wafers. The metrology data includes a first set of vectors associated with the first semiconductor device wafer and a second set of vectors associated with the second semiconductor device wafer. The method includes determining a similarity index based in part on a similarity index value between a first vector from the first set of vectors and a second vector from the second set of vectors and continuing to process additional wafers under current parameters when the similarity index is above a threshold value.

Claims

1. A method for semiconductor fabrication process control, the method comprising:

receiving a first semiconductor device wafer, the first semiconductor device wafer having a first patterned material layer thereon and being fabricated under a first set of parameters;

receiving a second semiconductor device wafer, the second semiconductor device wafer having a second patterned material layer thereon, the first and second patterned material layers being patterned with a common mask;

collecting metrology data from the first and second semiconductor device wafers, the metrology data including a first set of vectors associated with the first semiconductor device wafer and a second set of vectors associated with the second semiconductor device wafer;

determining a similarity index based in part on a similarity index value between a first vector from the first set of vectors and a second vector from the second set of vectors; and

continuing to process additional wafers under the first set of parameters when the similarity index is above a threshold value.

2. The method of claim 1, further comprising ceasing production of additional wafers under the first set of parameters when the similarity index is below the threshold value.

3. The method of claim 1, wherein the second semiconductor device wafer is a control wafer.

4. The method of claim 1, wherein determining the similarity index based in part on a similarity index value comprises using the first vector and the second vector in a correlation function.

5. The method of claim 1, wherein determining the similarity index based in part on a similarity index value further comprises determining the similarity index based on a plurality of similarity index values.

6. The method of claim 1, wherein the similarity index is calculated as a cosine similarity between the first set of vectors and the second set of vectors.

7. The method of claim 6, wherein the cosine similarity between the first set of vectors and the second set of vectors is equal to

8. The method of claim 1, wherein the first and second patterned material layers are patterned using a common tool.

9. The method of claim 8, wherein the first semiconductor device wafer is fabricated at a first time, the second semiconductor device wafer is fabricated at a second time, and a third semiconductor device wafer is fabricated at a third time, the third wafer including a third patterned material layer patterned using the common mask and the common tool, the third time being after the second time, and the second time being after the first time, and further comprising:

collecting metrology data from the third semiconductor device wafer, the metrology data including a third set of vectors associated with the third semiconductor device wafer;

determining an additional similarity index based in part on a similarity index value between a first vector from the first set of vectors and a third vector from the third set of vectors; and

comparing the similarity index to the additional similarity index to determine a drift associated with the common tool.

10. The method of claim 1, further comprising:

comparing the first set of vectors with a computer-modeled wafer to generate a first model correction map;

comparing the second set of vectors with a computer-modeled wafer to generate a second model correction map;

determining an additional similarity index based on a correlation of the first and second model correction maps; and

modifying a computer model according to the additional similarity index.

11. A method for modeling semiconductor device fabrication, the method comprising:

receiving a first semiconductor device wafer, the first semiconductor device wafer having a first patterned material layer thereon and being fabricated under a set of parameters;

receiving a second semiconductor device wafer, the second semiconductor device wafer having a patterned material layer on a surface thereof, the first and second patterned material layers being patterned with a common mask;

collecting metrology data from the first and second semiconductor device wafers;

comparing the metrology data with modeled data provided by a computer model to generate a first correction map associated with the first semiconductor device wafer and a second correction map associated with the second semiconductor device wafer;

determining a similarity index by comparison of the first and second correction maps; and

updating the computer model when the similarity index is above a threshold value.

12. The method of claim 11, wherein the first semiconductor device wafer is a production wafer and the second semiconductor device wafer is a control wafer that is fabricated earlier in time that the production wafer.

13. The method of claim 11, wherein determining the similarity index comprises using a first set of vectors from the first correction map and a second set of vectors from the second correction map in a correlation function.

14. The method of claim 13, wherein the similarity index is calculated as a cosine similarity between the first set of vectors and the second set of vectors.

15. The method of claim 14, wherein the cosine similarity between the first set of vectors and the second set of vectors is equal to

16. A semiconductor device fabrication process control system comprising:

one or more processors, the one or more processors being in communication with a memory;

one or more system inputs configured to facilitate control by an operator and communication with external devices;

one or more system outputs configured to facilitate use by the operator, at least one system output providing communication to a display;

a metrology data acquisition module configured to acquire metrology data from plurality of semiconductor device wafers that includes a first semiconductor device wafer and a control wafer, the metrology data from the first semiconductor device wafer and the control wafer being stored in the memory;

a similarity check module configured to determine a similarity index of a first semiconductor device wafer by comparing the first semiconductor device wafer to a control wafer, the similarity check module further configured to output an indication of whether the similarity index is above a threshold value.

17. The system of claim 16, further comprising:

a model computation module configured to provide a predictive computer model of the first semiconductor device wafer and to compare the predictive computer model with the metrology data from the first semiconductor device wafer to generate a first model correction map and with the metrology data from the control wafer to generate a second model correction map; and

wherein the similarity check module is further configured to determine an additional similarity index by comparing the first model correction map with the second model correction map and to output an indication of whether the additional similarity index is above a threshold value.

18. The system of claim 17, wherein the metrology data acquisition module acquires metrology data from a coupled metrology data acquisition system.

19. The system of claim 16, further comprising a similarity matrix module configured to:

access metrology data for the plurality of semiconductor device wafers stored in the memory, the metrology data for each of the plurality of semiconductor device wafers being associated in memory with an associated processing tool of a plurality of processing tools; and

generate a tool matching matrix.

20. The system of claim 19, wherein the tool matching matrix indicates a compatibility of a first processing tool with a second processing tool of the plurality of processing tools.