SHARED RECEIVE QUEUE ALLOCATION FOR NETWORK ON A CHIP COMMUNICATION

• US 20150081941A1
• Filed: 09/18/2013
• Published: 03/19/2015
• Est. Priority Date: 09/18/2013
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Brown, Jeffrey D., Shearer, Robert A.
• Granted Patent: US 9,378,168 B2
• Time in Patent Office: Days
• US Class Current: 710/116
• CPC Class Codes: G06F 13/14 Handling requests for interconnection or transfer
• CPC Class Codes: G06F 13/362 with centralised access control
• CPC Class Codes: G06F 13/3625 using a time dependent access
• CPC Class Codes: H04L 2012/5679 Arbitration or scheduling
• CPC Class Codes: H04L 2012/5681 Buffer or queue management
• CPC Class Codes: H04L 47/781 Centralised allocation of resources
• CPC Class Codes: H04L 49/3045 Virtual queuing

Abstract

A circuit arrangement, method, and program product for communicating data in a processing architecture comprising a plurality of interconnected IP blocks. Transmitting IP blocks may transmit messages to a shared receive queue for a first IP block. Receipt of the messages at the shared receive queue may be controlled based on receive credits allocated to each transmitting IP block. The allocation of receive credits for each transmitting IP block may dynamically managed such that the allocation of receive credits may be dynamically adjusted for each transmitting IP block based at least in part on message traffic associated with each transmitting IP block and/or a priority associated with each transmitting IP block.

Claims

1. A method for managing communication in a plurality of interconnected IP blocks, the method comprising:

controlling receipt of messages at a shared receive buffer of a first IP block communicated from transmitting IP blocks based on receive credits allocated to each transmitting IP block; and

dynamically managing the allocation of receive credits for each transmitting IP block.

2. The method of claim 1, wherein dynamically managing the allocation of receive credits for each IP block of the group is based at least in part on a priority associated with each transmitting IP block.

3. The method of claim 2, wherein dynamically managing the allocation of receive credits for each IP block of the group comprises:

reallocating at least one receive credit from a transmitting IP block having a low priority to a transmitting IP block having a high priority.

4. The method of claim 1, wherein each receive credit corresponds to a quantity of messages that may be received at the shared receive buffer for a given time period.

5. The method of claim 4, wherein dynamically managing the allocation of receive credits for each transmitting IP block is based at least in part on a usage of allocated receive credits for the given time period.

6. The method of claim 4, wherein the shared receive buffer is of a fixed storage size, and dynamically managing the allocation of receive credits for each transmitting IP block is based at least in part on the fixed storage size such that the quantity of messages that may be received at the shared receive buffer for a given time period corresponds to the fixed storage size.

7. The method of claim 4, wherein dynamically managing the allocation of receive credits for each transmitting IP block is based at least in part on a rate at which each transmitting IP block uses allocated receive credits for the given time period.

8. The method of claim 1, further comprising:

in response to a particular transmitting IP block not using all allocated IP blocks within a given time period, reclaiming at least one allocated receive credit from the particular transmitting IP block.

9. The method of claim 1, further comprising:

in response to a particular transmitting IP block using all allocated IP blocks within a given time period, allocating at least one additional receive credit to the particular transmitting IP block.

10. The method of claim 1, wherein dynamically managing the allocation of receive credits for each transmitting IP block comprises:

updating a counter for the shared receive queue associated with a transmitting IP block responsive to receiving a message from the transmitting IP block.

11. The method of claim 10, further comprising:

analyzing the counter associated with the transmitting IP block to determine a rate at which the transmitting IP block uses allocated receive credits.

12. The method of claim 11, wherein each receive credit corresponds to a message that may be transmitted to the shared receive queue for a given time period, the method further comprising:

allocating at least one additional receive credit to the transmitting IP block based at least in part on the rate at which the transmitting IP block uses allocated receive credits for the given time period.

13. A circuit arrangement comprising:

a plurality of interconnected IP blocks, including a first IP block and transmitting IP blocks configured to communicate messages for the first IP block; and

a shared receive queue including a memory coupled to the interconnected IP blocks and configured to control the receipt of messages for the first IP block based on receive credits allocated to each transmitting IP block, and dynamically manage the allocation of receive credits for each transmitting block.

14. The circuit arrangement of claim 13, wherein the shared receive queue is configured to dynamically manage the allocation of receive credits for each transmitting block based at least in part on a priority associated with each transmitting IP block.

15. The circuit arrangement of claim 14, wherein the shared receive queue is configured to dynamically manage the allocation of receive credits for each transmitting block by:

reallocating at least one receive credit from a transmitting IP block having a low priority to a transmitting IP block having a high priority.

16. The circuit arrangement of claim 13, wherein each receive credit corresponds to a quantity of messages that may be received at the shared receive buffer for a given time period.

17. The circuit arrangement of claim 16, wherein the shared receive queue is configured to dynamically manage the allocation of receive credits for each transmitting block based at least in part on a usage of allocated receive credits for the given time period.

18. The circuit arrangement of claim 16, wherein the memory of the shared receive queue is of a fixed storage size, and the shared receive queue is configured to dynamically manage the allocation of receive credits for each transmitting block based at least in part on the fixed storage size such that the quantity of messages that may be received at the shared buffer for a given time period corresponds to the fixed storage size.

19. The circuit arrangement of claim 13, wherein the shared receive queue is configured to dynamically manage the allocation of receive credits for each transmitting block based at least in part on a rate at which each transmitting IP block communicates messages to the shared receive queue.

20. The circuit arrangement of claim 13, wherein the shared receive queue includes counter logic configured to maintain a counter for each transmitting IP block, and update the counter for each transmitting IP block responsive to receiving a message from the transmitting IP block.

21. An integrated circuit device comprising the circuit arrangement of claim 13.

22. A program product comprising a computer readable medium and logic definition program code resident on the computer readable medium and defining the circuit arrangement of claim 13.