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PREDICTIVE FETCHING AND DECODING FOR SELECTED INSTRUCTIONS

  • US 20150089194A1
  • Filed: 12/03/2014
  • Published: 03/26/2015
  • Est. Priority Date: 06/28/2013
  • Status: Active Grant
First Claim
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1. A method of facilitating processing within a processing environment, the method comprising:

  • predicting that a selected instruction is to execute in a pipelined processor, the pipelined processor having a plurality of stages of processing including an execute stage, and the selected instruction having a first privilege level and one or more other instructions executing in the pipelined processor having a second privilege level different from the first privilege level;

    based on predicting the selected instruction is to execute, predicting an entry address for the selected instruction and operating state associated therewith, the entry address indicating a location at which an instruction is to be fetched based on the selected instruction;

    based on predicting the entry address, fetching the instruction at the entry address prior to the selected instruction reaching the execute stage; and

    initiating decoding of the fetched instruction based on the predicted operating state.

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