SEMICONDUCTOR DEVICE HAVING A MONOLITHIC INTER-TIER VIA (MIV), AND METHOD OF MAKING SAME
First Claim
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1. A three dimensional semiconductor device comprising:
- a first memory device;
a second memory device; and
a via, wherein the via connects the first memory device to the second memory device.
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Abstract
A three dimensional semiconductor device includes a first memory device, a second memory device and a via. The via connects the first memory device to the second memory device.
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Citations
20 Claims
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1. A three dimensional semiconductor device comprising:
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a first memory device; a second memory device; and a via, wherein the via connects the first memory device to the second memory device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A stacked semiconductor structure comprising:
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a first memory device, the first memory device comprising; a first transistor device; a bit line, wherein the first transistor device is connected to the bit line by a first drain via; a first word line, wherein the first transistor device is connected to the first word line; a second memory device, the second memory device comprising; a second transistor device; an inter-layer dielectric (ILD), wherein the first memory device and the second memory device are separated by the ILD; and a first via, wherein the first memory device is electrically connected to the second memory device by the first via. - View Dependent Claims (15, 16, 17)
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18. A method of making a semiconductor device, the method comprising:
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forming a first memory device; connecting a first word line to the first memory device; forming at least a first via, forming a second memory device, wherein the first and second memory devices are separated by an inter-layer dielectric (ILD), and the first via connects the first memory device and the second memory device; connecting a second word line to the second memory device; connecting a bit line to the second memory device; and connecting the bit line to the first memory device by the first via. - View Dependent Claims (19, 20)
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Specification