CAMERA CONTROL INTERFACE SLEEP AND WAKE UP SIGNALING

• US 20150095537A1
• Filed: 10/01/2014
• Published: 04/02/2015
• Est. Priority Date: 10/02/2013
• Status: Abandoned Application

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Sengoku, Shoichiro
• Application Number:
  US14/504,413
• Publication Number:
  US 20150095537A1
• Time in Patent Office: Days
• US Class Current: 710/110
• CPC Class Codes: G06F 1/3253 Power saving in bus
• CPC Class Codes: G06F 13/362 with centralised access control
• CPC Class Codes: G06F 13/4295 using an embedded synchronisation

Abstract

A device is provided comprising a control data bus including at least a first line. A master device may be coupled to the control data bus and configured to control the control data bus. A plurality of slave devices may be coupled to the control data bus and share the first line. The master device may be configured to send a single global wake up signal on the control data bus that causes any sleeping slave devices to wake up. Alternatively, the master device may send a global wake up signal followed by a targeted sleep signal to non-targeted slave devices to implement a “targeted wake up” of specific slave devices. The master device may send the single global wake up signal by bringing the first line low for a predetermined period of time.

Claims

1. A device, comprising:

a control data bus including at least a first line;

a master device coupled to the control data bus and configured to manage access to the control data bus; and

a plurality of slave devices coupled to the control data bus and sharing the first line, wherein the master device is configured to send a single global wake up signal on the control data bus that causes any sleeping slave devices to wake up.

2. The device of claim 1, wherein the master device is configured to send the single global wake up signal by bringing the first line low for a predetermined period of time.

3. The device of claim 1, wherein sending the single global wake up signal comprises bringing the first line low for a predetermined period of about at least 30 μ

seconds.

4. The device of claim 1, wherein the master device maintains a slave device sleep status list of sleeping slave devices.

5. The device of claim 4, wherein all sleeping slave devices send a wake up confirmation signal to the master device after waking up, and the master device updates the slave device sleep status list based on the wake up confirmation signals.

6. The device of claim 4, wherein at least a first slave device is dynamically configurable to operate in either a master mode or a slave mode, and when the master device receives a master request from the first slave device, the master device transfers the slave device sleep status list of sleeping slave devices to the first slave device before transferring control of the control data bus to the first slave device.

7. The device of claim 1, wherein the master device sends a sleep broadcast signal to all devices coupled to the control data bus, wherein the sleep broadcast signal specifically identifies one or more slave devices that should go into the sleep mode or specifically identifies one or more slave devices that should ignore the sleep request.

8. The device of claim 1, wherein a first slave device coupled to the control data bus unilaterally enters into the sleep mode and notifies the master device of entering into the sleep mode via a bus separate from the control data bus.

9. The device of claim 8, wherein the master device adds the first slave device to a slave device sleep status list upon receive of the sleep notification.

10. The device of claim 1, wherein a first slave device coupled to the control data bus spontaneously wakes up, without involvement from the master device, and sends an interrupt signal to the master device, via a bus separate from the control data bus, that it has awoken.

11. The device of claim 10, wherein upon receipt of the interrupt signal, the master device removes the first slave device from a slave device sleep status list.

12. The device of claim 1, wherein the master device also includes a sleep mode, and wherein the master device is adapted to wake up upon receipt of a first interrupt signal from a slave device over an interrupt line separate from control data bus.

13. The device of claim 12, wherein the slave device sends a second interrupt signal if there is no response to the first interrupt signal from the master device.

14. (canceled)

15. The method of claim 14, wherein the control data bus is a two line bus and the wake up signal is implemented by bringing the first line high or low for a predetermined period of time.

16. The method of claim 14, further comprising:

maintaining a slave device sleep status list at the master device.

17. The method of claim 16, further comprising:

receiving an interrupt signal after each slave device wakes up, and

updating the slave device sleep status list based on the received interrupt signal.

18. The method of claim 16, wherein master device is dynamically configurable to operate in either a master mode or slave mode, and when the master device receives a master request from a first slave device, the master device transfers the slave device sleep status list of sleeping slave devices to the first slave device before transferring control of the control data bus to the first slave device.

19. The method of claim 18, further comprising:

switching to operate in slave mode after transferring control of the control data bus.

20. The method of claim 14, further comprising:

sending a sleep broadcast signal to all devices coupled to the control data bus, wherein the sleep broadcast signal specifically identifies one or more slave devices that should go into the sleep mode or specifically identifies one or more slave devices that should ignore the sleep request.

21. The method of claim 14, further comprising:

receiving an interrupt signal, via an interrupt request bus, from a first slave device indicating that the first slave device is entering into the sleep mode.

22. The method of claim 14, wherein the master device receives an interrupt signal from a slave device, via an interrupt request bus separate from the control data bus, indicating that the slave device has spontaneously woken up.

23. The method of claim 22, wherein upon receipt of the interrupt signal, the master device removes the first slave device from a slave device sleep status list.

24. The method of claim 14, wherein the master device enters into a sleep mode, and the master device is adapted to wake up upon receipt of a first interrupt signal from a slave device over an interrupt line separate from control data bus.

25. The method of claim 24, wherein upon receipt of the interrupt signal, the master device removes the first slave device from a slave device sleep status list.

14-1. A method operational on a master device, comprising:

controlling a control data bus with the master device, the control data bus including at least a first line; and

transmitting, via the control data bus from the master device to a plurality of slave devices, a single global wake up signal that causes any sleeping slave devices to wake up.

26. A master device, comprising:

a bus interface to couple to a control data bus shared with a plurality of slave devices; and

a processing circuit coupled to the bus interface and configured to;

manage access to the control data bus by the plurality of slave devices; and

issue a global wake up command to the plurality of slave devices over the control data bus.

27. The master device of claim 26, wherein the processing circuit is further configured to:

maintain a slave device sleep status list; and

update the slave device sleep status list upon receiving an indication of a slave device waking up.

28. The master device of claim 26, wherein the processing circuit is further configured to:

send a single global wake up signal by bringing a first line of the control data bus low for a predetermined period.

29. The master device of claim 26, further comprising:

a receiver logic circuit adapted to sense an interrupt request from a slave device over an interrupt line and awaken the master device even when the master device is in a sleep mode.

30. A slave device, comprising:

a bus interface to couple to a control data bus shared with a plurality of slave devices; and

a receiver logic circuit coupled to the bus interface and, in a sleep mode of operation, configured to;

obtain a free running clock signal;

use the free running clock signal to measure a length of time a line of the control data bus is either pulled low or high; and

wake up the slave device if the measured length of time is greater than a predetermined amount of time.