COPLANAR INTEGRATION OF A DIRECT-BANDGAP CHIP INTO A SILICON PHOTONIC DEVICE

• US 20150097210A1
• Filed: 10/08/2014
• Published: 04/09/2015
• Est. Priority Date: 10/09/2013
• Status: Active Grant

• Current Assignee: Skorpios Technologies Inc.
• Original Assignee: Skorpios Technologies Inc.
• Inventors: Krasulick, Stephen B., Dallesasse, John, Mizrahi, Amit, Creazzo, Timothy, Marchena, Elton, Spann, John Y.
• Granted Patent: US 9,496,431 B2
• Time in Patent Office: Days
• US Class Current: 257/184
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H01S 2301/176 Specific passivation layers on surfaces other than the emission facet
• CPC Class Codes: H01S 5/0207 Substrates having a special shape
• CPC Class Codes: H01S 5/021 Silicon based substrates
• CPC Class Codes: H01S 5/0217 Removal of the substrate
• CPC Class Codes: H01S 5/0218 Substrates comprising semiconducting materials from other groups of the Periodic Table than the materials of the active layer
• CPC Class Codes: H01S 5/02325 Mechanically integrated components on mount members or optical micro-benches
• CPC Class Codes: H01S 5/02326 Arrangements for relative positioning of laser diodes and optical components, e.g. grooves in the mount to fix optical fibres or lenses
• CPC Class Codes: H01S 5/0234 Up-side down mountings, e.g. Flip-chip, epi-side down mountings or junction down mountings
• CPC Class Codes: H01S 5/0237 by soldering
• CPC Class Codes: H01S 5/02375 Positioning of the laser chips
• CPC Class Codes: H01S 5/02469 Passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active cooling element like a TEC
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/3013 AIIIBV compounds

Abstract

A method for fabricating a composite device comprises providing a platform, providing a chip, and bonding the chip to the platform. The platform has a base layer and a device layer above the base layer. An opening in the device layer exposes a portion of the base layer. The chip is bonded to the portion of the base layer exposed by the opening in the device layer. A portion of the chip extends above the platform and is removed.

Claims

1. A method for fabricating a composite device used for photonics, the method comprising:

providing a platform, the platform comprising;

a base layer;

a device layer above the base layer of the platform, wherein the device layer comprises a plurality of walls forming an opening in the device layer such that a portion of the base layer of the platform is exposed through the device layer;

providing a chip, the chip comprising;

a substrate; and

an active region;

bonding the chip to the portion of the base layer of the platform.

2. The method for fabricating the composite device as recited in claim 1, wherein:

the chip extends through the opening of the device layer;

the substrate of the chip extends above the platform, out of the recess; and

the active region of the chip is aligned with the device layer.

3. The method for fabricating the composite device as recited in claim 2, further comprising removing at least a portion of the substrate of the chip, while the chip is bonded to the platform, so that the chip does not extend above the platform.

4. The method for fabricating the composite device as recited in claim 1, wherein the platform is silicon and the chip is a direct-bandgap material.

5. The method for fabricating the composite device as recited in claim 1, further comprising aligning the active region with the device layer using pedestals formed in the platform.

6. A method for fabricating a composite device, the method comprising:

providing a platform, wherein;

the platform comprises a recess; and

the platform comprises a first material;

providing a chip, wherein;

the chip comprises a second material;

the second material is different from the first material; and

the chip comprises a portion of a substrate;

bonding the chip to the platform; and

removing the portion of the substrate from off the chip after the chip is bonded to the platform.

7. The method for fabricating the composite device as recited in claim 6, wherein the portion of the substrate extended above the platform and after removing the portion of the substrate the chip does not extend above the platform.

8. The method for fabricating the composite device as recited in claim 6, wherein removing the portion of the substrate is performed by etching.

9. The method for fabricating the composite device as recited in claim 6, further comprising fabricating the chip by growing an etch stop above the substrate and then growing the active region above the etch stop.

10. The method for fabricating the composite device as recited in claim 6, wherein the chip further comprises an etch stop and removing the at least a portion of the substrate includes etching the chip to the etch stop.

11. The method for fabricating the composite device as recited in claim 6 wherein the platform further comprises an oxide layer and the recess goes through the oxide layer.

12. The method for fabricating the composite device as recited in claim 6, wherein the second material is a III-V material.

13. The method for fabricating the composite device as recited in claim 6, wherein:

the platform comprises a device layer and a base layer;

the device layer is above the base layer of the platform;

the device layer comprises a plurality of walls forming an opening in the device layer such that a portion of the base layer of the platform is exposed through the device layer, thus forming the recess; and

the chip is bonded to the portion of the base layer of the platform in the recess.

14. A composite device for splitting functionality across two or more materials, the composite device comprising:

a platform, the platform comprising;

a base layer;

a device layer above the base layer of the platform, wherein;

the device layer comprises a first material;

the first material is a semiconductor; and

the device layer comprises a plurality of walls forming an opening in the device layer such that a portion of the base layer of the platform is exposed through the device layer;

a chip, wherein;

the chip comprises an active region;

the active region comprises a second material; and

the second material is different from the first material; and

a bond securing the platform to the chip, wherein the chip is secured to the portion of the base layer of the platform.

15. The composite device of claim 14, further comprising an etch stop layer on the chip.

16. The composite device of claim 14, wherein the second material is a direct-bandgap material.

17. The composite device of claim 16, wherein the second material is a III-V semiconductor material.

18. The composite device of claim 14, the platform further comprising an oxide layer, wherein the oxide layer is between the base layer and the device layer.

19. The composite device of claim 14, wherein the chip does not extend above the platform.

20. The composite device of claim 19, wherein the active region is optically aligned with the device layer.