Asymmetric Inductors in Multi-Phase DCDC Converters

• US 20150097542A1
• Filed: 10/14/2013
• Published: 04/09/2015
• Est. Priority Date: 10/07/2013
• Status: Active Grant

• Current Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Inventors: Kobayashi, Hidenori, Childs, Mark, Svorc, Jindrich, Repton, Andrew
• Granted Patent: US 9,768,688 B2
• Time in Patent Office: Days
• US Class Current: 323/282
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 3/1582 Buck-boost converters H02M3/1584 takes precedence
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A multi-phase DC-to-DC converter is configured to achieve fast transient response and to optimize efficiency over the load range. Phase shedding changes the active number of phases according to output currents. Each phase of the converter has an inductor configured to optimize the efficiency for a range of load currents in which that phase is used. A converter may have 3 phases, the first used only in sleep mode and has a large inductance with low AC losses, the second used in sync mode at low currents and having a lower inductance with low AC losses, the third phase is used in sync mode at high currents and has small inductance with low DC losses. The number of phases is ≧2.

Claims

1. A method to achieve both high efficiency and fast transient response of a multi-phase DC-to-DC converter and to optimize the efficiency over the load range of the DCDC converter, the method comprising the steps of:

(1) providing the multi-phase converter;

(2) deploying at least two circuit branches to the converter, wherein each branch comprises a pulse generator and inductive means, wherein all branches are jointly connected to an output node of the converter, wherein all branches are connected in parallel and wherein one or more branches activated together correspond to an operation phase of the converter, wherein activation of one or more branches is assigned to a dedicated operation phase which is dependent upon a load current; and

(3) configuring an inductance of the inductive means of each branch in order to optimize the efficiency for a range of load current in which the branch is assigned to, wherein the inductance of a branch used in a sleep mode is configured to have a relatively high inductance with low AC losses and the higher the range of the load current assigned to a branch is the lower are the configured inductance of the inductive means and the configured DC loss.

2. The method of claim 1, wherein phase shedding is used to operate the DCDC converter, wherein an active number of the branches used is adapted to a value of a load current wherein the active number of branches may be lower than the total number of branches.

3. The method of claim 1, wherein only one branch is used in the sleep mode, which is controlled by a controlling means, wherein the inductive means of the branch assigned to sleep mode has the highest inductance of all branches and a low AC loss.

4. The method of claim 3, wherein the controlling means is a feedback loop.

5. The method of claim 3, wherein the controlling means provides a hysteretic mode.

6. The method of claim 1, wherein the multi-phase DC-to-DC converter is a multi-phase buck converter.

7. The method of claim 1, wherein the multi-phase DC-to-DC converter is a multi-phase buck-boost converter.

8. The method of claim 1, wherein the multi-phase DC-to-DC converter is a multi-phase boost converter.

9. The method of claim 1 wherein in the sleep mode only one branch of the circuit is activated.

10. The method of claim 9 wherein in the sleep mode branch the highest inductance of all branches is deployed and in all other branches a lower inductance is deployed wherein in the other branches a same inductance is deployed.

11. The method of claim 1 wherein in heavy load mode all branches of the circuit are activated.

12. A multi-phase DC-to-DC converter configured both to achieve fast transient response to optimize efficiency over the load range of a DCDC converter comprising:

a node for an output voltage

an error amplifier having inputs and an output, wherein a first input is the output voltage of the regulator, a second input is a reference voltage, and the output is an input of a number of pulse generators;

a ramp signal generator providing ramp signals to each of said pulse generator; and

a number of circuit branches connected in parallel, wherein a first terminal of each branch is connected to the output of the error amplifier and a second terminal of each branch is connected to the node of the output voltage, wherein each branch comprises means of generating pulse-width modulated control signal and inductive means, wherein the inductive means of each branch are configured to be adapted to optimize the efficiency of each branch for a range of load currents in which the branch is used.

13. The multiphase converter of claim 12, wherein the multi-phase DC-to-DC converter is a multi-phase buck converter.

14. The multiphase converter of claim 12, wherein the multi-phase DC-to-DC converter is a multi-phase buck-boost converter.

15. The multiphase converter of claim 12, wherein the multi-phase DC-to-DC converter is a multi-phase boost converter.

16. The multi-phase converter of claim 12, which is configured to use phase shedding to operate the converter, wherein an active number of the branches used is adapted to a value of a load current wherein the active number may be lower than the total number of branches.

17. The multi-phase converter of claim 12, wherein only one branch is used in the sleep mode, which is controlled by controlling means, wherein the inductive means of the branch assigned to sleep mode has the highest inductance of all branches and a low AC loss.

18. The multi-phase converter of claim 17, wherein the controlling means is a feedback loop.

19. The multi-phase converter of claim 12, wherein in the sleep mode branch the highest inductance of all branches is deployed and in all other branches a lower inductance is deployed, wherein in the other branches a same inductance is deployed.

20. The multi-phase converter of claim 12, wherein in heavy load mode all branches of the circuit are activated.