Switching Circuits For Extracting Power From An Electric Power Source And Associated Methods

• US 20150108960A1
• Filed: 12/23/2014
• Published: 04/23/2015
• Est. Priority Date: 08/18/2010
• Status: Active Grant

• Current Assignee: Volterra Semiconductor LLC (Analog Devices, Inc.)
• Original Assignee: Volterra Semiconductor Corporation (Analog Devices, Inc.)
• Inventors: Stratakos, Anthony J., McJimsey, Michael D., Jergovic, Ilija, Ikriannikov, Alexandr, Der Minassians, Artin, Yao, Kaiwei, Lidsky, David B., Zuniga, Marco A., Borisavljevic, Ana
• Granted Patent: US 9,577,426 B2
• Time in Patent Office: Days
• US Class Current: 323/282
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H02J 1/102 being switching converters H02J1/108, H02J1/12 take precedence
• CPC Class Codes: H02J 1/106 for load balancing, symmetrisation, or sharing
• CPC Class Codes: H02J 2300/24 of photovoltaic origin
• CPC Class Codes: H02J 3/381 Dispersed generators
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H03K 17/102 in field-effect transistor switches
• CPC Class Codes: H03K 17/122 in field-effect transistor switches
• CPC Class Codes: H03K 17/145 in field-effect transistor switches
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 2217/0036 Means reducing energy consumption
• CPC Class Codes: H03K 2217/0054 Gating switches, e.g. pass gates
• CPC Class Codes: Y02E 10/56 Power conversion systems, e.g. maximum power point trackers

Abstract

An integrated circuit chip includes a first input port, a first output port, and first and second transistors electrically coupled in series across the first input port. The second transistor is also electrically coupled across the first output port and is adapted to provide a path for current flowing through the first output port when the first transistor is in its non-conductive state. The integrated circuit chip additionally includes first driver circuitry for driving gates of the first and second transistors to cause the transistors to switch between their conductive and non-conductive states. The integrated circuit chip further includes first controller circuitry for controlling the first driver circuitry such that the first and second transistors switch between their conductive and non-conductive states to at least substantially maximize an amount of electric power extracted from an electric power source electrically coupled to the first input port.

Claims

1. An integrated circuit chip, comprising:

a first input port and a first output port;

first and second transistors electrically coupled in series across the first input port, the second transistor also electrically coupled across the first output port and adapted to provide a path for current flowing through the first output port when the first transistor is in its non-conductive state;

first driver circuitry for driving gates of the first and second transistors to cause the transistors to switch between their conductive and non-conductive states; and

first controller circuitry for controlling the first driver circuitry such that the first and second transistors switch between their conductive and non-conductive states to at least substantially maximize an amount of electric power extracted from an electric power source electrically coupled to the first input port.

2. The integrated circuit chip of claim 1, the integrated circuit chip being a flip chip integrated circuit chip.

3. The integrated circuit chip of claim 1, further comprising first, second, and third terminals, the first and second terminals providing an electrical interface to the first input port, and the second and third terminals providing an electrical interface to the first output port.

4. The integrated circuit chip of claim 1, wherein the first controller circuitry is operable to:

control the first driver circuitry such that the first and second transistors cooperate to transfer power from the first input port to the first output port during a first operating mode of the first controller circuitry, and

control the first driver circuitry such that the second transistor shunts the first output port during a second operating mode of the first controller circuitry.

5. The integrated circuit chip of claim 4, wherein the first controller circuitry is adapted to operate the first controller circuitry in its second operating mode upon occurrence of an event selected from the group consisting of (1) voltage across the first input port being below a threshold value, (2) voltage across the first input port being above a threshold value, (3) power transferred from the first input port to the first output port being below a threshold value, (4) a magnitude of current flowing through the first input port being below a threshold value, (5) a magnitude of current flowing through the first output port exceeding a threshold value, and (6) a temperature of one or more components of the integrated circuit chip exceeding a threshold value.

6. The integrated circuit chip of claim 1, wherein the first controller circuitry is operable to shut down switching of at least the first transistor if a temperature of one or more components of the integrated circuit chip exceed a threshold value.

7. The integrated circuit chip of claim 1, wherein the first controller circuitry is operable to shut down switching of at least the first transistor if a magnitude of current flowing through the first input port exceeds a threshold value.

8. The integrated circuit chip of claim 1, wherein the first controller circuitry is operable to shut down switching of at least the first transistor if voltage across the first input port is below a threshold value.

9. The integrated circuit chip of claim 1, wherein the first controller circuitry is operable to at least substantially maximize an average value of a voltage at an intermediate switching node where the first and second transistors are electrically coupled.

10. The integrated circuit chip of claim 1, wherein the first controller circuitry is operable to repeatedly sample an average value of a voltage at an intermediate switching node and control switching of the first transistor at least partly based on at least two successive samples of the average value of the voltage at the intermediate switching node, the intermediate switching node being a node where the first and second transistors are electrically coupled.

11. The integrated circuit chip of claim 10, wherein a starting time of the first controller circuitry is loosely controlled.

12. The integrated circuit chip of claim 1, wherein a frequency at which the first transistor switches between its conductive and non-conductive states is loosely controlled.

13. The integrated circuit chip of claim 1, further comprising:

a second input port and a second output port;

third and fourth transistors electrically coupled in series across the second input port, the fourth transistor also electrically coupled across the second output port and adapted to provide a path for current flowing through the second output port when the third transistor is in its non-conductive state;

second driver circuitry for driving gates of the third and fourth transistors to cause the transistors to switch between their conductive and non-conductive states; and

second controller circuitry for controlling the second driver circuitry such that the third and fourth transistors switch between their conductive and non-conductive states to at least substantially maximize an amount of electric power extracted from an electric power source electrically coupled to the second input port.

14. The integrated circuit chip of claim 13, the first and second controller circuitry being part of a common controller.

15. The integrated circuit chip of claim 13, the first and second output ports being electrically coupled in series within the integrated circuit chip.

16. The integrated circuit chip of claim 13, wherein:

the first controller circuitry is operable to;

control the first driver circuitry such that the first and second transistors cooperate to transfer power from the first input port to the first output port during a first operating mode of the first controller circuitry, and

control the first driver circuitry such that the second transistor shunts the first output port during a second operating mode of the first controller circuitry; and

the second controller circuitry is operable to;

control the second driver circuitry such that the third and fourth transistors cooperate to transfer power from the second input port to the second output port during a first operating mode of the second controller circuitry, and

control the second driver circuitry such that the fourth transistor shunts the second output port during a second operating mode of the second controller circuitry.

17. A photovoltaic system, comprising:

a photovoltaic cell; and

an integrated circuit chip, including;

an output port for electrically coupling to a load,

first and second transistors electrically coupled in series across the photovoltaic cell, the second transistor also electrically coupled across the output port and adapted to provide a path for current flowing through the output port when the first transistor is in its non-conductive state,

driver circuitry for driving gates of the first and second transistors to cause the transistors to switch between their conductive and non-conductive states, and

controller circuitry for controlling the driver circuitry such that the first and second transistors switch between their conductive and non-conductive states to at least substantially maximize an amount of electric power extracted from the photovoltaic cell.

18. The photovoltaic system of claim 17, the integrated circuit chip being a flip chip integrated circuit chip.

19. The photovoltaic system of claim 17, the controller circuitry configured to cause the first and second transistors switch between their conductive and non-conductive states at a switching frequency of at least 200 kilohertz.

20. The photovoltaic system of claim 19, wherein:

the integrated circuit chip further includes an input port interfacing the first and second transistors with the photovoltaic cell; and

ripple current flowing through the input port is filtered primarily by one or more multi-layer ceramic capacitors.