SEMICONDUCTOR DEVICE

• US 20150115222A1
• Filed: 09/22/2014
• Published: 04/30/2015
• Est. Priority Date: 10/25/2013
• Status: Active Grant

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: KYONO, Takashi, AKITA, Katsushi, SHIBATA, Kaoru, NISHIZUKA, Koji, FUJII, Kei
• Granted Patent: US 9,123,843 B2
• Time in Patent Office: Days
• US Class Current: 257/21
• CPC Class Codes: H01L 31/02963 characterised by the doping material
• CPC Class Codes: H01L 31/0304 including, apart from doping materials or other impurities, only AIIIBV compounds
• CPC Class Codes: H01L 31/035236 Superlattices; Multiple quantum well structures
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: Y02E 10/544 Solar cells from Group III-V materials

Abstract

A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 μm and less than or equal to 8 μm, the semiconductor device having a dark current density of less than or equal to 1×10⁻¹ A/cm² when a reverse bias voltage of 60 mV is applied at a temperature of −140° C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.

Claims

1. A semiconductor device comprising a semiconductor layer laminate in which a plurality of semiconductor layers are laminated,

said semiconductor layer laminate including a light receiving layer,

said light receiving layer being grown by a metal-organic vapor phase epitaxy method,

said light receiving layer having a cutoff wavelength of more than or equal to 3 μ

m and less than or equal to 8 μ

m,

the semiconductor device having a dark current density of less than or equal to 1×

10<sup>−

1</sup> A/cm² when a reverse bias voltage of 60 mV is applied at a temperature of −

140°

C.

2. The semiconductor device according to claim 1, wherein said light receiving layer has a multiple quantum well structure.

3. The semiconductor device according to claim 2, wherein

said light receiving layer has a type II multiple quantum well structure, and

one period of said multiplex quantum well includes at least gallium antimonide and indium arsenide.

4. The semiconductor device according to claim 1, wherein said light receiving layer has a carbon concentration of less than or equal 1×

10¹⁶ cm<sup>−

3</sup>.

5. A semiconductor device comprising a semiconductor layer laminate in which a plurality of semiconductor layers are laminated,

said semiconductor layer laminate including a light receiving layer,

said light receiving layer having a cutoff wavelength of more than or equal to 3 μ

m and less than or equal to 8 μ

m,

the semiconductor device having a dark current density of less than or equal to 1×

10<sup>−

4</sup> A/cm² when a reverse bias voltage of 60 mV is applied at a temperature of −

140°

C.

6. The semiconductor device according to claim 5, wherein

said light receiving layer has a cutoff wavelength of more than or equal to 3 μ

m and less than or equal to 5 μ

m, and

the semiconductor device has a dark current density of less than or equal to 5×

10<sup>−

5</sup> A/cm² when a reverse bias voltage of 60 mV is applied at a temperature of −

140°

C.

7. The semiconductor device according to claim 5, wherein

said light receiving layer has a cutoff wavelength of more than or equal to 3 μ

m and less than or equal to 6 μ

m, and

the semiconductor device has a dark current density of less than or equal to 1×

10<sup>−

8</sup> A/cm² when a reverse bias voltage of 60 mV is applied at a temperature of −

196°

C.

8. The semiconductor device according to claim 5, wherein

said light receiving layer has a cutoff wavelength of more than or equal to 6 μ

m and less than or equal to 8 μ

m, and

the semiconductor device has a dark current density of less than or equal to 1×

10<sup>−

5</sup> A/cm² when a reverse bias voltage of 60 mV is applied at a temperature of −

196°

C.

9. The semiconductor device according to claim 5, wherein said light receiving layer has a multiple quantum well structure.

10. The semiconductor device according to claim 9, wherein

said light receiving layer has a type II multiple quantum well structure, and

one period of said multiplex quantum well includes at least gallium antimonide and indium arsenide.

11. The semiconductor device according to claim 5, wherein said light receiving layer has a carbon concentration of less than or equal to 1×

10¹⁶ cm<sup>−

3</sup>.

12. The semiconductor device according to claim 5, wherein said light receiving layer is grown by a metal-organic vapor phase epitaxy method.