PLATFORM FRAMEWORK FOR WIRELESS MEDIA DEVICE SIMULATION AND DESIGN

• US 20150118959A1
• Filed: 10/28/2013
• Published: 04/30/2015
• Est. Priority Date: 10/28/2013
• Status: Abandoned Application

• Current Assignee: JB IP Acquisitions LLC
• Original Assignee: JB IP Acquisitions LLC
• Inventors: Petit, Nicolas Jean, Gangishetti, Narsimham Venkat
• Application Number:
  US14/065,393
• Publication Number:
  US 20150118959A1
• Time in Patent Office: Days
• US Class Current: 455/41.1
• CPC Class Codes: G06F 11/3692 for test results analysis
• CPC Class Codes: G06F 30/20 Design optimisation, verification or simulation optimisation, verification or simulation of circuit designs G06F30/30
• CPC Class Codes: H04W 4/80 Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication

Abstract

Embodiments of the invention relate generally to electrical and electronic hardware, computer aided simulation and design, high-level language numerical computation, analysis, programming, and visualization of designs, target hardware compilers, assembly code, computer software, wired and wireless network communications, wearable, hand held, and portable computing devices for facilitating communication of information. More specifically, disclosed is a framework for computer aided simulation and design of wireless media devices for one or more target hardware platforms.

Claims

1. A method of simulation and design verification of a wireless device, comprising:

capturing a plurality of signals in a data collection system, the plurality of signals including input signals for a wireless media device;

providing a high-level language (HLL) model, the HLL model including inputs and outputs that match the plurality of signals, the HLL model comprised of a plurality of blocks having inputs and outputs that are interconnected in the HLL model to implement a block level functionality of the wireless media device, each block implements a function of the wireless media device;

providing a plurality of optimized operator modules coded in a format for a target hardware platform, each optimized operator module is coded to implement the function of a corresponding block in the plurality of blocks and receives data inputs and generates data outputs corresponding to the inputs and outputs of its corresponding block;

executing the HLL model on a HLL simulation tool configured to apply the input signals from the plurality of signals to the inputs of the HLL model, to process the input signals according the function implemented by each block, and to generate simulated output signals on the outputs of the HLL model; and

analyzing the simulated output signals to determine how closely the HLL model meets a performance criteria for the wireless media device.

2. The method of claim 1, wherein the data collection system includes data storage for storing the plurality of signals that are captured.

3. The method of claim 1, wherein the target hardware platform comprises an integrated circuit (IC) selected from the group consisting of a controller, a multi-core controller, a processor, a multi-core processor, a digital signal processor (DSP), a multi-core DSP, a system on chip (SoC), a multi-core SoC, and an application specific IC (ASIC).

4. The method of claim 1, wherein providing the plurality of optimized operator modules comprises selecting a ported library module from a target hardware library that includes a plurality of ported library modules, with each ported library module including a unique plurality of optimized operator modules coded in a format for a unique target hardware platform.

5. The method of claim 1, wherein the format for the target hardware platform comprises an assembly language.

6. The method of claim 1 and further comprising:

compiling the plurality of optimized operator modules into an executable code configured to execute on one or more processors in the target hardware platform, the executable code embodied in a non-transitory computer readable medium that is electrically accessed by the one or more processors.

7. The method of claim 6 and further comprising:

executing the executable code on the one or more processors while applying the input signals from the plurality of signals to input ports of the target hardware platform; and

analyzing hardware output signals from output ports of the target hardware platform to determine how closely the plurality of optimized operator modules meets the performance criteria for the wireless media device.

8. The method of claim 7, wherein the analyzing hardware output signals comprises comparing the hardware output signals with the simulated output signals.

9. The method of claim 8 and further comprising:

revising one or more blocks in the plurality of blocks, one or more optimized operator modules in the plurality of optimized operator modules or both, when the comparing indicates the HLL model, the executable code or both do not meet the performance criteria.

10. The method of claim 9, wherein the revising occurs in the HLL simulation tool.

11. The method of claim 6, wherein the compiling occurs in the HLL simulation tool.

12. The method of claim 1, wherein the plurality of signals includes one or more output signals.

13. The method of claim 12, wherein the analyzing comprises comparing the simulated output signals with the one or more output signals from the plurality of signals.

14. The method of claim 13, wherein the one or more output signals comprise signals selected from the group consisting of a transmit channel (Tx) signal, a speaker signal, a simulated echo signal, and an indicator signal.

15. The method of claim 1, wherein the input signals from the plurality of signals comprise one or more signals selected from the group consisting of a microphone signal, a vibration sensor signal, a vibration detector signal, an accelerometer signal, a skin surface microphone (SSM) signal, a switch signal, and a receive channel (Rx) signal.

16. A computer program product embodied in a computer executable non-transitory computer readable medium configured for simulation and design verification of a wireless device, comprising steps of:

capturing a plurality of signals in a data collection system, the plurality of signals including input signals for a wireless media device;

providing a high-level language (HLL) model, the HLL model including inputs and outputs that match the plurality of signals, the HLL model comprised of a plurality of blocks having inputs and outputs that are interconnected in the HLL model to implement a block level functionality of the wireless media device, each block implements a function of the wireless media device;

providing a plurality of optimized operator modules coded in a format for a target hardware platform, each optimized operator module is coded to implement the function of a corresponding block in the plurality of blocks and receives data inputs and generates data outputs corresponding to the inputs and outputs of its corresponding block;

executing the HLL model on a HLL simulation tool configured to apply the input signals from the plurality of signals to the inputs of the HLL model, to process the input signals according the function implemented by each block, and to generate simulated output signals on the outputs of the HLL model;

analyzing the simulated output signals to determine how closely the HLL model meets a performance criteria for the wireless media device; and

compiling, after the performance criteria are met, the plurality of optimized operator modules into executable firmware in a target language for a target hardware platform that executes the firmware on one or more hardware processors to implement functions of the wireless media device, the firmware embodied in a non-transitory computer medium.