COEXISTENCE OF MESSAGE-PASSING-LIKE ALGORITHMS AND PROCEDURAL CODING

• US 20150120781A1
• Filed: 10/24/2013
• Published: 04/30/2015
• Est. Priority Date: 10/24/2013
• Status: Active Grant

• Current Assignee: SAP SE
• Original Assignee: SAP SE
• Inventors: Schreter, Ivan
• Granted Patent: US 9,600,551 B2
• Time in Patent Office: Days
• US Class Current: 707/792
• CPC Class Codes: G06F 16/27 Replication, distribution or synchronisation of data between databases or within a distributed database system; Distributed database system architectures therefor
• CPC Class Codes: G06F 9/5077 Logical partitioning of resources; Management or configuration of virtualized resources specific details on emulation or internal functioning of virtual machines G06F9/455

Abstract

First logical cores supported on physical processor cores in a computing system can be designated for execution of message-passing workers of a plurality of message workers while at least second logical cores supported on the physical processor cores can be designated for execution of procedural code such that resources of a physical processor core supporting the first logical core and the second logical core are shared between a first logical core and a second logical core. A database object in a repository can be assigned to one message-passing worker, which can execute operations on the database object while procedurally coded operations are processed using the second logical core on one or more of the plurality of physical processor cores while the first logical core executes the message-passing worker.

Claims

1. A computer program product comprising a machine-readable medium storing instructions that, when executed by at least one programmable processor, cause the at least one programmable processor to perform operations comprising:

designating a first logical core of a plurality of logical cores supported on each of a plurality of physical processor cores in a computing system for execution of a message-passing worker of a plurality of message workers;

designating a second logical core of the plurality of logical cores supported on each of the plurality of physical processor cores for execution of procedural code such that resources of a respective physical processor core supporting the first logical core and the second logical core are shared between the first logical core and the second logical core;

assigning a database object in a repository to one message-passing worker of the plurality of message-passing workers;

delivering an operation for execution on the database object to the one message-passing worker; and

processing procedurally coded operations using the second logical core on one or more of the plurality of physical processor cores while the first logical core executes the message-passing worker.

2. A computer program product as in claim 1, wherein the operations further comprise:

assigning a plurality of database objects that comprises the database object to the one message-passing worker supported by the first logical core.

3. A computer program product as in claim 2, wherein each of the plurality of database objects has its own register maintained by the message-passing worker.

4. A computer program product as in claim 1, wherein the procedurally coded operations comprise loading data from main system memory so that a processing stream can be built from it.

5. A computer program product as in claim 1, wherein the operation for execution on the database object comprises a table operation performed using a data manipulation language.

6. A computer program product as in claim 1, wherein the operation for execution on the database object assigned to the message-passing worker comprises a random access operation whose performance efficiency is cache miss driven.

7. A system comprising:

at least one programmable processor; and

a machine-readable medium storing instructions that, when executed by the at least one programmable processor, cause the at least one programmable processor to perform operations comprising;

designating a first logical core of a plurality of logical cores supported on each of a plurality of physical processor cores in a computing system for execution of a message-passing worker of a plurality of message workers;

designating a second logical core of the plurality of logical cores supported on each of the plurality of physical processor cores for execution of procedural code such that resources of a respective physical processor core supporting the first logical core and the second logical core are shared between the first logical core and the second logical core;

assigning a database object in a repository to one message-passing worker of the plurality of message-passing workers;

delivering an operation for execution on the database object to the one message-passing worker; and

processing procedurally coded operations using the second logical core on one or more of the plurality of physical processor cores while the first logical core executes the message-passing worker.

8. A system as in claim 7, wherein the operations further comprise:

assigning a plurality of database objects that comprises the database object to the one message-passing worker supported by the first logical core.

9. A system as in claim 8, wherein each of the plurality of database objects has its own register maintained by the message-passing worker.

10. A system as in claim 7, wherein the procedurally coded operations comprise loading data from main system memory so that a processing stream can be built from it.

11. A system as in claim 7, wherein the operation for execution on the database object comprises a table operation performed using a data manipulation language.

12. A system as in claim 7, wherein the operation for execution on the database object assigned to the message-passing worker comprises a random access operation whose performance efficiency is cache miss driven.

13. A computer-implemented method comprising:

designating a first logical core of a plurality of logical cores supported on each of a plurality of physical processor cores in a computing system for execution of a message-passing worker of a plurality of message workers;

designating a second logical core of the plurality of logical cores supported on each of the plurality of physical processor cores for execution of procedural code such that resources of a respective physical processor core supporting the first logical core and the second logical core are shared between the first logical core and the second logical core;

assigning a database object in a repository to one message-passing worker of the plurality of message-passing workers;

delivering an operation for execution on the database object to the one message-passing worker; and

processing procedurally coded operations using the second logical core on one or more of the plurality of physical processor cores while the first logical core executes the message-passing worker.

14. A computer-implemented method as in claim 13, wherein the operations further comprise:

assigning a plurality of database objects that comprises the database object to the one message-passing worker supported by the first logical core.

15. A computer-implemented method as in claim 14, wherein each of the plurality of database objects has its own register maintained by the message-passing worker.

16. A computer-implemented method as in claim 13, wherein the procedurally coded operations comprise loading data from main system memory so that a processing stream can be built from it.

17. A computer-implemented method as in claim 13, wherein the operation for execution on the database object comprises a table operation performed using a data manipulation language.

18. A computer-implemented method as in claim 13, wherein the operation for execution on the database object assigned to the message-passing worker comprises a random access operation whose performance efficiency is cache miss driven.

19. A computer-implemented method as in claim 13, wherein the designating of the first logical core and the second logical core, the assigning, the delivering, and the processing are performed by at least one system comprising at least one programmable processor.