Processing Device and Processing Method

• US 20150130731A1
• Filed: 11/10/2014
• Published: 05/14/2015
• Est. Priority Date: 11/08/2013
• Status: Active Grant

• Current Assignee: eGalax_eMPIA Technology Inc.
• Original Assignee: eGalax_eMPIA Technology Inc.
• Inventors: CHANG, CHIN-FU
• Granted Patent: US 9,569,017 B2
• Time in Patent Office: Days
• US Class Current: 345/173
• CPC Class Codes: G06F 2203/04101 2.5D-digitiser, i.e. digitiser detecting the X/Y position of the input means, finger or stylus, also when it does not touch, but is proximate to the digitiser's interaction surface and also measures the distance of the input means within a short range in the Z direction, possibly with a separate measurement setup
• CPC Class Codes: G06F 2203/04104 Multi-touch detection in digitiser, i.e. details about the simultaneous detection of a plurality of touching locations, e.g. multiple fingers or pen and finger
• CPC Class Codes: G06F 3/03545 Pens or stylus
• CPC Class Codes: G06F 3/04162 for exchanging data with external devices, e.g. smart pens, via the digitiser sensing hardware
• CPC Class Codes: G06F 3/0442 using active external devices, e.g. active pens, for transmitting changes in electrical potential to be received by the digitiser
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Abstract

The present invention provides a processing device, which includes a plurality of digital demodulators and an information transmitting module. Each of the digital demodulators is configured to generate in-phase and quadrature signal information corresponding to a frequency. The information transmitting module is configured to receive, process, and transmit the in-phase and quadrature signal information.

Claims

1. A processing device comprising:

a plurality of digital demodulators, each of the digital demodulators configured to generate in-phase and quadrature signal information corresponding to a frequency; and

an information transmitting module configured to receive, process, and transmit the in-phase and quadrature signal information generated by the plurality of digital demodulators.

2. The processing device of claim 1, wherein each digital demodulator includes:

an analog-to-digital converter (ADC) for sampling and converting an input signal to a digital received signal;

a signal generator for generating a corresponding in-phase signal and a corresponding quadrature signal based on the sampling points of the ADC and the frequency;

at least one mixer for mixing the in-phase signal and the digital received signal to generate an in-phase digital signal and mixing the quadrature signal and the digital received signal to generate a quadrature digital signal; and

at least one addition integrator for performing addition integration on the in-phase digital signal to generate an in-phase integration signal and performing addition integration on the quadrature digital signal to generate a quadrature integration signal.

3. The processing device of claim 2, wherein the information transmitting module is configured to transmit the in-phase and quadrature signal information including the in-phase integration signal and the quadrature integration signal to a mainframe, the mainframe performs squaring on the in-phase integration signal and the quadrature integration signal and then performs root mean square (RMS) operation on the sum thereof to obtain a signal strength of the signal received by the digital demodulator with respect to the frequency corresponding to the in-phase and quadrature signal information.

4. The processing device of claim 2, wherein the information transmitting module is configured to perform squaring on the in-phase integration signal and the quadrature integration signal and calculate the sum thereof, and then transmit the in-phase and quadrature signal information including the sum to a mainframe, the mainframe performs RMS operation on the sum to obtain a signal strength of the signal received by the digital demodulator with respect to the frequency corresponding to the in-phase and quadrature signal information.

5. The processing device of claim 2, wherein the information transmitting module is configured to perform squaring on the in-phase integration signal and the quadrature integration signal and calculate RMS of the sum thereof in order to obtain a signal strength of the signal received by the digital demodulator with respect to the frequency, and then transmit the signal strength.

6. The processing device of claim 2, wherein the mixer and the addition integrator both perform operations on integers.

7. The processing device of claim 6, wherein the signal generator generates a set of in-phase and quadrature signals every 60 degrees, and the ADC also performs sampling every 60 degrees.

8. The processing device of claim 7, wherein, at 30 degrees, 90 degrees, 150 degrees, 210 degrees, 270 degrees, and 330 degrees, the sinusoidal signal values generated by the signal generator are 1, 2, 1, −

1, −

2, and −

1, respectively; and

the cosine signal values are 1, 0, 1, −

1, 0, and −

1, respectively,

9. The processing device of claim 6, wherein the signal generator generates a set of in-phase and quadrature signals every 90 degrees, and the ADC also performs sampling every 90 degrees.

10. The processing device of claim 9, wherein, at 45 degrees, 135 degrees, 225 degrees, and 315 degrees, the sinusoidal signal values generated by the signal generator are 1, 1, −

1, and −

1, respectively; and

the cosine signal values are 1, −

1, −

1, and 1, respectively.

11. The processing device of claim 2, wherein each digital demodulator further includes:

at least one squarer for calculating the square of the in-phase integration signal and the square of the quadrature signal; and

an adder for calculating the sum of the squares of the in-phase integration signal and the quadrature signal.

12. The processing device of claim 11, wherein the information transmitting module performs RMS operation on the sum to obtain a signal strength of the signal received by the digital demodulator with respect to the frequency, and transmits the signal strength.

13. The processing device of claim 11, wherein the information transmitting module is configured to transmit the in-phase and quadrature signal information including the sum to a mainframe, the mainframe performs RMS operation on the sum to obtain a signal strength of the signal received by the digital demodulator with respect to the frequency corresponding to the in-phase and quadrature signal information.

14. The processing device of claim 1, wherein the processing speed of the information transmitting module matches its transmission speed.

15. A processing method comprising:

simultaneously performing a plurality of digital demodulation steps, each digital demodulation step generating in-phase and quadrature signal information corresponding to a frequency; and

receiving, processing and transmitting the in-phase and quadrature signal information generated by the plurality of digital demodulation steps.

16. The processing method of claim 15, wherein the digital demodulation step further includes:

performing analog-to-digital conversion (ADC) on a received signal to generate a digital received signal;

mixing an in-phase signal and the digital received signal to generate an in-phase digital signal;

mixing a quadrature signal and the digital received signal to generate a quadrature digital signal, wherein the frequency of the in-phase signal and the quadrature signal is said frequency;

performing addition integration on the in-phase digital signal to generate an in-phase integration signal; and

performing addition integration on the quadrature digital signal to generate a quadrature integration signal.

17. The processing method of claim 16, wherein the processing and transmitting step further includes:

transmitting the in-phase and quadrature signal information including the in-phase integration signal and the quadrature integration signal to a mainframe, the mainframe being configured to perform squaring on the in-phase integration signal and the quadrature integration signal and then perform root mean square (RMS) operation on the sum thereof to obtain a signal strength of the signal received by the digital demodulation step with respect to the frequency corresponding to the in-phase and quadrature signal information.

18. The processing method of claim 16, wherein the processing and transmitting step further includes:

performing squaring on the in-phase integration signal and the quadrature integration signal and calculating the sum thereof, and then transmitting the in-phase and quadrature signal information including the sum to a mainframe, the mainframe being configured to perform RMS operation on the sum to obtain a signal strength of the signal received by the digital demodulation step with respect to the frequency corresponding to the in-phase and quadrature signal information.

19. The processing method of claim 16, wherein the processing and transmitting step further includes:

performing squaring on the in-phase integration signal and the quadrature integration signal and calculating the RMS of the sum thereof in order to obtain a signal strength of the signal received by the digital demodulation step with respect to the frequency corresponding to the in-phase and quadrature signal information, and then transmitting the signal strength.

20. The processing method of claim 16, wherein the mixing step and the addition integration step both perform operations on integers.

21. The processing method of claim 20, wherein a set of in-phase and quadrature signals is generated every 60 degrees, and the ADC step also performs sampling every 60 degrees.

22. The processing method of claim 21, wherein, at 30 degrees, 90 degrees, 150 degrees, 210 degrees, 270 degrees, and 330 degrees, the sinusoidal signal values generated are 1, 2, 1, −

1, −

2, and −

1, respectively; and

the cosine signal values are 1, 0, 1, −

1, 0, and −

1, respectively.

23. The processing method of claim 20, wherein a set of in-phase and quadrature signals is generated every 90 degrees, and the ADC step also performs sampling every 90 degrees.

24. The processing method of claim 23, wherein, at 45 degrees, 135 degrees, 225 degrees, and 315 degrees, the sinusoidal signal values generated are 1, 1, −

1, and −

1, respectively; and

the cosine signal values are 1, −

1, −

1, and 1, respectively.

25. The processing method of claim 16, wherein each digital demodulation step further includes:

calculating the sum of the square of the in-phase integration signal and the square of the quadrature signal.

26. The processing method of claim 25, wherein the processing and transmitting step further includes:

performing RMS operation on the sum to obtain a signal strength of the signal received by the digital demodulation step with respect to the frequency, and transmitting the signal strength.

27. The processing method of claim 25, wherein the processing and transmitting step further includes transmitting the in-phase and quadrature signal information including the sum to a mainframe, the mainframe being configured to perform RMS operation on the sum to obtain a signal strength of the signal received by the digital demodulation step with respect to the frequency corresponding to the in-phase and quadrature signal information.

28. The processing method of claim 15, wherein in the processing and transmitting step, the speed of the processing step matches the speed of the transmitting step.