TRACKING MECHANISM FOR WRITING TO A MEMORY CELL
First Claim
1. A circuit comprising:
- a write driver;
a data circuit;
a memory cell;
a tracking write buffer;
a tracking write driver; and
a tracking cell,wherein the circuit is configured that, during a write operation of the memory cell based on a clock signal,the write driver circuit is configured to generate a write control signal on a write control line to control the memory cell;
the data circuit is configured to provide write data to the memory cell on a write data line;
the tracking write buffer is configured to generate a tracking write control signal on a tracking write control line to control the tracking cell;
the tracking write driver is configured to generate a tracking write data signal on a tracking write data line to be transferred to the tracking cell; and
the tracking cell is configuredto adjust a signal at a first node of the tracking cell toward having a logical value based on a logical value of the tracking write data signal in response to the tracking write control signal; and
to generate a tracking signal based on the signal at the first node of the tracking cell.
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Accused Products
Abstract
A circuit includes a write driver, a data circuit, a memory cell, a tracking write buffer, a tracking write driver, and a tracking cell. The circuit is configured that, during a write operation of the memory cell based on a clock signal, the write driver circuit is configured to generate a write control signal to control the memory cell; the data circuit is configured to provide write data to the memory cell; the tracking write buffer is configured to generate a tracking write control signal; and the tracking write driver is configured to generate a tracking write data signal to be transferred to the tracking cell. The tracking cell is configured to adjust a signal at a first node of the tracking cell based on a logical value of the tracking write data signal in response to the tracking write control signal.
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Citations
20 Claims
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1. A circuit comprising:
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a write driver; a data circuit; a memory cell; a tracking write buffer; a tracking write driver; and a tracking cell, wherein the circuit is configured that, during a write operation of the memory cell based on a clock signal, the write driver circuit is configured to generate a write control signal on a write control line to control the memory cell; the data circuit is configured to provide write data to the memory cell on a write data line; the tracking write buffer is configured to generate a tracking write control signal on a tracking write control line to control the tracking cell; the tracking write driver is configured to generate a tracking write data signal on a tracking write data line to be transferred to the tracking cell; and the tracking cell is configured to adjust a signal at a first node of the tracking cell toward having a logical value based on a logical value of the tracking write data signal in response to the tracking write control signal; and to generate a tracking signal based on the signal at the first node of the tracking cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of writing to a memory cell comprising:
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based on a clock signal, generating a first edge of a write control signal on a write control line of the memory cell; setting a write data signal on a write data line of the memory cell to have a first value; generating a first edge of a tracking write control signal on a tracking write control line; and setting a tracking write data signal on a tracking write data line to have a second value; responsive to the tracking write control signal, adjust a signal at a first node of a tracking cell to have a third value based on the second value of the tracking write data signal; generating a reset signal based on the signal at the first node of the tracking cell; and based on the reset signal, generating a second edge of the write control signal. - View Dependent Claims (11, 12, 13, 14)
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15. A tracking circuit in a memory macro comprising:
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a clock generator circuit; a tracking cell comprising a first node; a tracking write buffer; a tracking write control line coupled with the tracking cell and the tracking write buffer; a tracking write driver; and a tracking write data line coupled with the tracking cell and the tracking write driver, wherein the clock generator circuit is configured to receive a first clock signal, and, based on the first clock signal, generate a first edge of a second clock signal; the tracking write buffer, based on the first edge of the second clock signal, is configured to generate a first edge of a tracking write control signal on the tracking write control line; the tracking write driver, based on the first edge of the second clock signal, is configured to set a tracking write data signal on the tracking write data line to a first logical value; and the tracking cell is configured to be written at the first node with the first logical value from the tracking write data signal in response to the tracking write control signal. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification