METHOD FOR FORMING A FINFET STRUCTURE

• US 20150132966A1
• Filed: 12/29/2014
• Published: 05/14/2015
• Est. Priority Date: 11/14/2013
• Status: Abandoned Application

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Shih, Hung-Lin, Chen, Jei-Ming, Liu, Chih-Chien, Lin, Chin-Fu, Li, Kuan-Hsien
• Application Number:
  US14/583,813
• Publication Number:
  US 20150132966A1
• Time in Patent Office: Days
• US Class Current: 438/703
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/823462 with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
• CPC Class Codes: H01L 29/401 Multistep manufacturing processes

Abstract

A method for forming a FinFET structure includes providing a substrate, a first region and a second region being defined on the substrate, a first fin structure and a second fin structure being disposed on the substrate within the first region and the second region respectively. A first oxide layer cover the first fin structure and the second fin structure. Next a first protective layer and a second protective layer are entirely formed on the substrate and the first oxide layer in sequence, the second protective layer within the first region is removed, and the first protective layer within the first region is then removed. Afterwards, the first oxide layer covering the first fin structure and the second protective layer within the second region are removed simultaneously, and a second oxide layer is formed to cover the first fin structure.

Claims

1. A method for forming a FinFET structure, at least comprising the following steps:

providing a substrate, a first region and a second region being defined on the substrate, a first fin structure and a second fin structure being disposed on the substrate within the first region and the second region respectively, a first oxide layer covering the first fin structure and the second fin structure;

forming a first protective layer and a second protective layer entirely on the substrate and the first oxide layer in sequence;

removing the second protective layer within the first region;

removing the first protective layer within the first region;

removing the first oxide layer covering the first fin structure and the second protective layer within the second region;

removing the first protective layer within the second region after the second protective layer within the second region is removed; and

forming a second oxide layer covering the first fin structure, wherein the second oxide layer is formed before the first protective layer within the second region is removed.

2. The method of claim 1, wherein the first oxide layer is thicker than the second oxide layer.

3. The method of claim 1, wherein the first oxide layer covering the first fin structure and the second protective layer within the second region are removed simultaneously.

4. The method of claim 1, wherein the first protective layer comprises a silicon nitride layer.

5. The method of claim 1, wherein the second protective layer comprises a silicon oxide layer.

6. The method of claim 1, further comprising forming an oxide region disposed in the substrate, surrounding the first fin structure and the second fin structure.

7. The method of claim 1, wherein the surface of the first fin structure is exposed after the first oxide layer is removed from the first fin structure.

8. The method of claim 1, wherein the method for removing the first oxide layer covering the first fin structure and the second protective layer within the second region comprises a dry-etching process and a wet-etching process.