POWER DEVICE

• US 20150137179A1
• Filed: 11/19/2013
• Published: 05/21/2015
• Est. Priority Date: 11/19/2013
• Status: Abandoned Application

• Current Assignee: Epistar Corporation
• Original Assignee: Epistar Corporation, Huga Optotech Incorporated (Epistar Corporation)
• Inventors: LIN, Heng-Kuang, YANG, Ya-Yu
• Application Number:
  US14/084,084
• Publication Number:
  US 20150137179A1
• Time in Patent Office: Days
• US Class Current: 257/190
• CPC Class Codes: H01L 29/1075 of field-effect transistors
• CPC Class Codes: H01L 29/154 comprising at least one long range structurally disordered material, e.g. one-dimensional vertical amorphous superlattices
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7787 with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

A power device disclosed herein comprises a substrate, a first semiconductor layer formed on the substrate, a second semiconductor layer formed on the first semiconductor layer and comprising a first element of group III, a third semiconductor layer formed on the second semiconductor layer and a plurality of first interlayers formed in the third semiconductor layer and comprising a second element of III group. The first element of III group and the second element of III group are the same. The second semiconductor layer and the plurality of first interlayers are doped with carbon.

Claims

1. A power device, comprising:

a substrate;

a first semiconductor layer formed on the substrate;

a second semiconductor layer formed on the first semiconductor layer and comprising a first element of group III;

a third semiconductor layer formed on the second semiconductor layer; and

a plurality of first interlayers formed in the third semiconductor layer and comprising a second element of ITT group;

wherein the first element of III group and the second element of III group are the same;

wherein the second semiconductor layer and the plurality of first interlayers are doped with carbon.

2. The power device according to claim 1, wherein the third semiconductor layer is doped with carbon,

3. The power device according to claim 1, wherein the third semiconductor layer is separated into a plurality of sublayers by the plurality of first interlayers.

4. The power device according to claim 3, further comprising a plurality of second interlayers formed in the third semiconductor layer, wherein the plurality of second interlayers are doped with carbon.

5. The power device according to claim 4, wherein doping types of the second semiconductor layer, the plurality of first interlayers, the third semiconductor layer and the plurality of second interlayers comprise grading type, step type and constant type.

6. The power device according to claim 4, wherein a dopant concentration range of carbon in the second semiconductor layer, the plurality of first interlayers, the third semiconductor layer or the plurality of second interlayers is between 1×

10¹⁷ to 1×

10²⁰ cm<sup>−

3</sup>.

7. The power device according to claim 4, wherein the plurality of first interlayers and the plurality of second interlayers are adjacent to each other respectively.

10. The power device according to claim 4, wherein the second interlayer comprises AlGaN or AlInGaN.

11. The power device according to claim 1, wherein the first interlayer comprises AlN or AlGaN.

8. The power device according to claim wherein each of the second interlayers comprises a third element of III group and a content of the third element of III group is decreased in a direction away from the adjacent first interlayer.

9. The power device according to claim 8, wherein the third element and the second element are the same.

12. A power device, comprising:

a substrate;

a first semiconductor layer formed on the substrate;

a second semiconductor layer formed on the first semiconductor layer;

a third semiconductor layer formed on the second semiconductor layer;

a plurality of first interlayers formed in the third semiconductor layer and comprising a first lattice constant; and

a plurality of second interlayers formed in the third semiconductor layer and comprising a second lattice constant;

wherein the first lattice constant is smaller than the second lattice constant.

13. The power device according to claim 12, wherein the third semiconductor layer is separated into a plurality of sublayers by the plurality of first interlayers.

14. The power device according to claim 13, wherein the plurality of second interlayers is disposed between the plurality of first interlayers and the plurality of sublayers respectively.

15. The power device according to claim 14, wherein the second lattice constant comprises a grading lattice constant increase in a direction away from the first interlayer.

16. The power device according to claim 13, wherein each of the first interlayers is sandwiched in between two of the second layers respectively.

17. The power device according to claim 16, wherein the second lattice constant of the plurality of second interlayers comprises a grading lattice constant increased in a direction away from the first interlayers.

18. The power device according to claim 12, wherein a thickness range of the first interlayers is between 1˜

100 nm.

19. The power device according to claim 12, wherein a thickness range of the second interlayers is between 1˜

100 nm.

20. The power device according to claim 12, wherein a variance type of the second lattice constant comprises grading type, step type, or constant type.