SEMICONDUCTOR DEVICE
First Claim
1. A semiconductor device comprising:
- a first signal line coupled to a first external terminal;
a second signal line coupled to a second external terminal;
a third signal line;
a power transistor disposed between the first signal line and the second signal line, a gate electrode of the power transistor being coupled to the third signal line;
a first resistive element disposed between the third signal line and the second signal line;
a clamp circuit disposed to clamp a voltage between the first signal line and the third signal line, the clamp circuit including a plurality of series-coupled diodes coupled between the first signal line and the third signal line, and a switch element coupled between the first signal line and one or more of the series-coupled diodes; and
a monitoring circuit that monitors a gate voltage of the power transistor, the monitoring circuit including a first transistor having a gate electrode coupled to the third signal line, a voltage generation section that is coupled between a source electrode of the first transistor and the second signal line to generate a voltage in accordance with an input current, and a load element disposed between a drain electrode of the first transistor and the first signal line,wherein a gate of the switch element is coupled between the load element and the drain electrode of the first transistor.
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Accused Products
Abstract
The semiconductor device includes a power transistor that is disposed between a first signal line, which is coupled to a first external terminal, and a second signal line, which is coupled to a second external terminal. A gate electrode of the power transistor is coupled to a third signal line. The semiconductor device further includes a clamp circuit that clamps a voltage between the first signal line and the third signal line, a first resistive element that is disposed between the third signal line and the second signal line, and a monitoring section that monitors a voltage between the third signal line and the second signal line. The clamp circuit is configured so that a clamp voltage can be changed. The monitoring section exercises control to decrease the clamp voltage when the voltage between the third signal line and the second signal line exceeds a predefined threshold value.
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Citations
20 Claims
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1. A semiconductor device comprising:
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a first signal line coupled to a first external terminal; a second signal line coupled to a second external terminal; a third signal line; a power transistor disposed between the first signal line and the second signal line, a gate electrode of the power transistor being coupled to the third signal line; a first resistive element disposed between the third signal line and the second signal line; a clamp circuit disposed to clamp a voltage between the first signal line and the third signal line, the clamp circuit including a plurality of series-coupled diodes coupled between the first signal line and the third signal line, and a switch element coupled between the first signal line and one or more of the series-coupled diodes; and a monitoring circuit that monitors a gate voltage of the power transistor, the monitoring circuit including a first transistor having a gate electrode coupled to the third signal line, a voltage generation section that is coupled between a source electrode of the first transistor and the second signal line to generate a voltage in accordance with an input current, and a load element disposed between a drain electrode of the first transistor and the first signal line, wherein a gate of the switch element is coupled between the load element and the drain electrode of the first transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor device comprising:
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a first signal line coupled to a first external terminal; a second signal line coupled to a second external terminal; a third signal line; a power transistor disposed between the first signal line and the second signal line, a gate electrode of the power transistor being coupled to the third signal line; a first resistive element disposed between the third signal line and the second signal line; a clamp circuit disposed between the first signal line and the third signal line to clamp a voltage between the first signal line and the third signal line, the clamp circuit including a plurality of series-coupled diodes coupled between the first signal line and the third signal line, and a switch element coupled between the first signal line and one or more of the series-coupled diodes; and a monitoring circuit that monitors a gate voltage of the power transistor, the monitoring circuit including a first transistor having a gate electrode coupled to the third signal line, a voltage generation section that is coupled between a source electrode of the first transistor and the second signal line to generate a voltage in accordance with an input current, and a load element disposed between a drain electrode of the first transistor and the first signal line; and a drive voltage generation circuit that outputs a drive voltage for driving the power transistor to the third signal line in accordance with a control signal, wherein a gate of the switch element is coupled between the load element and the drain electrode of the first transistor. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A semiconductor device comprising:
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a first signal line; a second signal line; a power transistor disposed between the first signal line and the second signal line; a first resistive element coupled between a gate electrode of the power transistor and the second signal line; a clamp circuit including a plurality of series-coupled diodes coupled between the first signal line and the gate electrode of the power transistor, and a switch element coupled between the first signal line and one or more of the series-coupled diodes; and a monitoring circuit including a first transistor having a gate electrode coupled to the gate electrode of the power transistor, a voltage generation section that is coupled between a source electrode of the first transistor and the second signal line, and a load element disposed between a drain electrode of the first transistor and the first signal line, wherein a gate of the switch element is coupled between the load element and the drain electrode of the first transistor. - View Dependent Claims (19, 20)
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Specification