INTEGRATED CIRCUIT IMPLEMENTATION OF METHODS AND APPARATUSES FOR MONITORING OCCUPANCY OF WIDEBAND GHz SPECTRUM, AND SENSING RESPECTIVE FREQUENCY COMPONENTS OF TIME-VARYING SIGNALS USING SUB-NYQUIST CRITERION SIGNAL SAMPLING

• US 20150146826A1
• Filed: 11/19/2014
• Published: 05/28/2015
• Est. Priority Date: 11/19/2013
• Status: Active Grant

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Lixin Shi
• Inventors: Katabi, Dina, Chandrakasan, Anantha, Salehi-Abari, Omid, Hamed, Ezzeldin, Al-Hassanieh, Haitham Z., Shi, Lixin, Agarwal, Abhinav, Stojanovic, Vladimir
• Granted Patent: US 9,313,072 B2
• Time in Patent Office: Days
• US Class Current: 375/340
• CPC Class Codes: G01P 3/489 Digital circuits therefor
• CPC Class Codes: H04B 1/16 Circuits
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04L 25/024 channel estimation algorithms
• CPC Class Codes: H04L 25/03038 with a non-recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 27/0006 Assessment of spectral gaps suitable for allocating digitally modulated signals, e.g. for carrier allocation in cognitive radio for spectrum sharing between different networks H04W16/14
• CPC Class Codes: H04L 27/2651 Modification of fast Fourier transform [FFT] or discrete Fourier transform [DFT] demodulators for performance improvement
• CPC Class Codes: H04L 27/2666 Acquisition of further OFDM parameters, e.g. bandwidth, subcarrier spacing, or guard interval length
• CPC Class Codes: H04W 16/14 Spectrum sharing arrangements between different networks

Abstract

An ASIC for monitoring wideband GHz spectrum to sense respective frequency components present in the spectrum. The ASIC implements Fast Fourier Transform (FFT) techniques to facilitate identification of one or more frequency components of a sparse signal after the signal is sub-sampled at a rate below the Nyquist criterion. The ASIC computes a first Fast Fourier Transform (FFT) of a first sub-sampled set of samples of a time-varying signal representing the monitored spectrum and sampled at a first sampling rate, and further computes a second FFT of a second sub-sampled set of samples of the time-varying signal sampled at a second sampling rate different from the first sampling rate. In one example, each of the first FFT and the second FFT is a low-radix FFT to facilitate a low-power and low-cost ASIC implementation of wideband spectrum sensing.

Claims

1. An integrated circuit apparatus to determine an N-point Fast Fourier Transform (FFT) of a time-varying signal so as to sense one or more frequency components of the time-varying signal, the apparatus comprising:

an input/output interface to receive a first sub-sampled set of samples of the time-varying signal sampled at a first sampling rate and a second sub-sampled set of samples of the time-varying signal sampled at a second sampling rate different from the first sampling rate; and

at least one processor communicatively coupled to the input/output interface to;

A) compute a first Fast Fourier Transform (FFT) for the first sub-sampled set of samples of the time-varying signal; and

B) compute a second FFT for the second sub-sampled set of samples of the time-varying signal,

wherein each of the first FFT and the second FFT is a low-radix FFT.

2. The apparatus of claim 1, wherein the apparatus is implemented as an Application Specific Integrated Circuit (ASIC).

3. The apparatus of claim 1, wherein the at least one processor computes the N-point FFT of the time-varying signal based at least in part on A) and B), and wherein the input/output interface is configured to output a digital representation of the N-point FFT so as to provide an indication of the one or more frequency components of the sampled time-varying signal.

4. The apparatus of claim 1, wherein:

at least one of the first and second FFTs is a radix-2 FFT; and

another of the first and second FFTs is a radix-3 FFT.

5. The apparatus of claim 1, wherein:

the time-varying signal has a frequency bandwidth of interest BW and a Nyquist sampling criteria of N samples in a sampling time T, wherein N=T×

BW;

the first sampling rate is BW/p₁ samples/second, wherein p₁ is less than N;

the second sampling rate is BW/p₂ samples/second, wherein p₂ is less than N; and

p₂ and p₁ are co-prime numbers.

6. The apparatus of claim 1, wherein:

the input/output interface is configured to provide to the at least one processor;

the first sub-sampled set of samples at the first sampling rate;

the second sub-sampled set of samples at the second sampling rate;

a third sub-sampled set of samples at the first sampling rate and time-shifted from the first sub-sampled set by a first number of samples; and

a fourth sub-sampled set of samples at the second sampling rate and time-shifted from the second sub-sampled set by a second number of samples;

the at least one processor further is configured to compute;

C) a third FFT for the third sub-sampled set of samples of the time-varying signal; and

D) a fourth FFT for the fourth sub-sampled set of samples of the time-varying signal, wherein the N-point FFT of the time-varying signal is based at least in part on A), B), C) and D).

7. The apparatus of claim 6, wherein:

the first number of samples is one sample; and

the second number of samples is one sample.

8. The apparatus of claim 6, wherein:

the input/output interface is configured to further provide to the at least one processor;

a fifth sub-sampled set of samples at the first sampling rate and time-shifted from the first sub-sampled set by a third number of samples; and

a sixth sub-sampled set of samples at the second sampling rate and time-shifted from the second sub-sampled set by the third number of samples; and

the at least one processor further is configured to compute;

E) a fifth FFT for the fifth sub-sampled set of samples of the time-varying signal; and

F) a sixth FFT for the sixth sub-sampled set of samples of the time-varying signal, wherein the N-point FFT of the time-varying signal is based at least in part on A), B), C), D), E) and F).

9. The apparatus of claim 8, wherein:

the first number of samples is one sample;

the second number of samples is one sample; and

the third number of samples is 32 samples.

10. A system, comprising:

the integrated circuit apparatus of claim 5; and

an analog-to-digital converter (ADC) apparatus, communicatively coupled to the input/output interface of the integrated circuit apparatus, to provide the first sub-sampled set of samples at the first sampling rate and the second sub-sampled set of samples at the second sampling rate.

11. The system of claim 10, wherein:

the input/output interface is configured to provide to the at least one processor;

the first sub-sampled set of samples at the first sampling rate;

the second sub-sampled set of samples at the second sampling rate;

a third sub-sampled set of samples at the first sampling rate and time-shifted from the first sub-sampled set by a first number of samples; and

a fourth sub-sampled set of samples at the second sampling rate time-shifted from the second sub-sampled set by a second number of samples; and

the at least one processor of the integrated circuit apparatus further computes;

C) a third FFT for the third sub-sampled set of samples of the time-varying signal; and

D) a fourth FFT for the fourth sub-sampled set of samples of the time-varying signal, wherein the N-point FFT of the time-varying signal is based at least in part on A), B), C) and D).

12. The system of claim 11, wherein:

the first number of samples is one sample; and

the second number of samples is one sample.

13. The system of claim 12, wherein:

the at least one input/output interface is configured to further provide to the at least one processor;

a fifth sub-sampled set of samples at the first sampling rate and time-shifted from the first sub-sampled set by a third number of samples; and

a sixth sub-sampled set of samples at the second sampling rate and time-shifted from the second sub-sampled set by the third number of samples; and

the at least one processor of the integrated circuit apparatus further computes;

E) a fifth FFT for the fifth sub-sampled set of samples of the time-varying signal; and

F) a sixth FFT for the sixth sub-sampled set of samples of the time-varying signal, wherein the N-point FFT of the time-varying signal is based at least in part on A), B), C), D), E) and F).

14. The system of claim 13, wherein:

the first number of samples is one sample;

the second number of samples is one sample; and

the third number of samples is 32 samples.

15. The apparatus of claim 5, wherein N is greater than 700,000.

16. The apparatus of claim 15, wherein N=746,496.

17. The apparatus of claim 5, wherein:

the first FFT is a B₁-point FFT, wherein B₁=N/p₁; and

the second FFT is a B₂-point FFT, wherein B₂=N/p₂.

18. The apparatus of claim 5, wherein the frequency bandwidth of interest BW is at least approximately 1 GHz.

19. The apparatus of claim 5, wherein the one or more frequency components of the time-varying signal occupy less than or equal to approximately 5% of the frequency bandwidth of interest BW.

20. The apparatus of claim 19, wherein the one or more frequency components of the time-varying signal occupy less than or equal to approximately 2% of the frequency bandwidth of interest BW.

21. The apparatus of claim 20, wherein the one or more frequency components of the time-varying signal occupy less than or equal to approximately 0.1% of the frequency bandwidth of interest BW.

22. The apparatus of claim 1, wherein the one or more frequency components of the time-varying signal respectively represent at least one of:

a Bluetooth signal;

a GSM signal;

a CDMA signal;

a Wi-Fi signal; and

a WiMax signal.

23. An Application Specific Integrated Circuit (ASIC) apparatus to determine an N-point Fast Fourier Transform (FFT) of a sampled time-varying signal so as to sense one or more frequency components of the sampled time-varying signal, the time-varying signal having a frequency bandwidth of interest BW and a Nyquist sampling criteria of N samples in a sampling time T, wherein N=T×

BW, the sampled time-varying signal including a first sub-sampled set of B₁ samples of the time-varying signal and a second sub-sampled set of B₂ samples of the time-varying signal, the apparatus comprising;

an input/output interface to receive the first sub-sampled set of B₁ samples and the second sub-sampled set of B₂ samples, wherein B₁=N/p₁, B₂=N/p₂, and wherein p₂ and p₁ are co-prime numbers and both less than N; and

at least one processor communicatively coupled to the input/output interface to;

A) compute a first B₁-point Fast Fourier Transform (FFT) for the first set of B₁ samples of the time-varying signal;

B) compute a second B₂-point FFT for the second set of B₂ samples of the time-varying signal; and

C) compute the N-point FFT of the sampled time-varying signal based at least in part on A) and B),

wherein;

each of the first B₁-point FFT and the second B₁-point FFT is a low-radix FFT; and

the input/output interface is configured to output the N-point FFT from C) so as to provide an indication of the one or more frequency components of the sampled time-varying signal.

24. A system, comprising:

the ASIC apparatus of claim 23; and

an analog-to-digital converter (ADC) apparatus, communicatively coupled to the input/output interface of the ASIC apparatus, to provide the first sub-sampled set of samples at the first sampling rate and the second sub-sampled set of samples at the second sampling rate.

25. An application specific integrated circuit (ASIC) apparatus to calculate a Fast Fourier Transform (FFT) of a signal, the ASIC apparatus comprising:

first circuitry implementing at least one first FFT having a first number of spectrum points; and

second circuitry implementing at least one second FFT having a second number of spectrum points,

wherein the first number and the second number are different.

26. The ASIC of claim 25, wherein the first number and the second number are co-prime numbers.

27. The ASIC of claim 25, wherein the first number is based on a first radix and the second number is based on a second radix.

28. The ASIC of claim 27, wherein the first radix and the second radix are small integers.

29. The ASIC of claim 28, wherein the first radix is 2 or 4 and the second radix is 3.

30. The ASIC of claim 25, wherein the signal is a sparse wideband signal.

31. The ASIC of claim 30, wherein the ASIC calculates the FFT over a bandwidth of interest for the signal of approximately 1 GHz.

32. The ASIC of claim 31, wherein one or more frequency components of the signal occupy less than or equal to approximately 0.1% of the bandwidth of interest for the signal.

33. An application specific integrated circuit (ASIC) apparatus for calculating a Fast Fourier Transform (FFT) of a signal, the ASIC apparatus comprising:

an input/output interface adapted to receive a discrete z-point signal, z being a product of at least two numbers;

one or more first xⁿ-word memory blocks configured to store xⁿ signal points sub-sampled by z/xⁿ from the z-point signal;

one or more second y^m-word memory blocks configured to store y^m signal points sub-sampled by z/y^m from the z-point signal, wherein x and y are co-prime numbers and n and m are natural numbers, and

a microprocessor for calculating the FFT of the signal, the microprocessor comprising;

a bucketization microarchitecture to sub-sample the received signal and alias signal points to buckets whose number is less or equal to z, and

a reconstruction microarchitecture designed to estimate a magnitude value and a frequency index of one or more frequency components of the z-point signal.