POWER DEVICE
First Claim
1. A voltage reduction apparatus, comprising:
- a switched capacitor voltage reduction circuit electrically coupled to a power source for receiving an input direct current (DC) power signal having an input voltage level from the power source and discharging an output DC power signal having an output voltage level that is less than the input voltage level, the switched capacitor voltage reduction circuit including a plurality of switched capacitor devices, each of the switched capacitor devices including;
an input switching device;
at least one capacitor; and
a pair of output switching devices, the switched capacitor voltage reduction circuit being operable between a charging state and a discharging state, the input switching devices configured to couple the capacitors in series in the charging state to transmit the input DC power signal to charge the capacitors, the output switching devices configured to couple the capacitors in parallel in the discharging state to discharge the output DC power signal from the capacitors.
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Accused Products
Abstract
An energy efficient apparatus includes a switching device, a frequency dependent reactive device, and a control element is provided. The switching device is coupled to a source of electrical power and includes a pair of transistors and is adapted to receive a control signal and to produce an alternating current power signal. The frequency of the alternating current power signal is responsive to the control signal. The frequency dependent reactive device is electrically coupled to the pair of transistors for receiving the alternating current power signal and producing an output power signal. The frequency dependent reactive device is chosen to achieve a desired voltage of the output power signal relative to the frequency of the alternating current power signal. The control element senses an actual voltage of the direct current power signal and modifies the control signal delivered to achieve the desired voltage of the direct current power signal.
110 Citations
23 Claims
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1. A voltage reduction apparatus, comprising:
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a switched capacitor voltage reduction circuit electrically coupled to a power source for receiving an input direct current (DC) power signal having an input voltage level from the power source and discharging an output DC power signal having an output voltage level that is less than the input voltage level, the switched capacitor voltage reduction circuit including a plurality of switched capacitor devices, each of the switched capacitor devices including; an input switching device; at least one capacitor; and a pair of output switching devices, the switched capacitor voltage reduction circuit being operable between a charging state and a discharging state, the input switching devices configured to couple the capacitors in series in the charging state to transmit the input DC power signal to charge the capacitors, the output switching devices configured to couple the capacitors in parallel in the discharging state to discharge the output DC power signal from the capacitors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A voltage reduction apparatus, comprising:
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a switched capacitor voltage reduction circuit electrically coupled to a power source for receiving an input DC power signal having an input voltage level from the power source and discharging an output DC power signal having an output voltage level that is less than the input voltage level, the switched capacitor voltage reduction circuit including a plurality of switched capacitor devices, each of the switched capacitor devices including; an input switching device; at least one capacitor; and a pair of output switching devices, the switched capacitor voltage reduction circuit being operable between a charging state and a discharging state, the input switching devices configured to couple the capacitors in series in the charging state to transmit the input DC power signal to charge the capacitors, the output switching devices configured to couple the capacitors in parallel in the discharging state to discharge the output DC power signal from the capacitors; and a processor programmed to sense the input voltage level and transmit control signals to the switched capacitor devices for regulating each of the switched capacitor devices as a function of the sensed input voltage level. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21)
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22. A method of assembling a voltage reduction apparatus, including the steps of:
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providing a semiconductor chip; forming a switched capacitor voltage reduction circuit on the semiconductor chip, the switched capacitor voltage reduction circuit configured to receive an input DC power signal having an input voltage level from a power source and discharge an output DC power signal having an output voltage level that is less than the input voltage level, the switched capacitor voltage reduction circuit including a plurality of switched capacitor devices, each of the switched capacitor devices including an input switching device, at least one capacitor, and a pair of output switching devices, the switched capacitor voltage reduction circuit being operable between a charging state and a discharging state, the input switching devices configured to couple the capacitors in series in the charging state to transmit the input DC power signal to charge the capacitors, the output switching devices configured to couple the capacitors in parallel in the discharge state to discharge the output DC power signal from the capacitors. - View Dependent Claims (23)
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Specification