BLOCK OPERATION BASED ACCELERATION

• US 20150161758A1
• Filed: 12/06/2013
• Published: 06/11/2015
• Est. Priority Date: 12/06/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: ASHBAUGH, Ben
• Granted Patent: US 9,811,334 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/00 Accessing, addressing or allocating within memory systems or architectures digital input from, or digital output to record carriers, e.g. to disk storage units, G06F3/06
• CPC Class Codes: G06F 9/30 Arrangements for executing machine instructions, e.g. instruction decode for executing microinstructions G06F9/22
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 1/60 Memory management

Abstract

Apparatuses, systems, and methods may implement a block operation on a data block. The block operation may include a data transfer event involving system memory to be performed by an element block independently of shared local memory. The block operation may also include a data transfer event involving system memory to be performed by the element block using one memory address for the element block. In addition, the block operation may include a data transfer event including a data register and/or excluding shared local memory to be performed by the element block. The block operation may include a data transfer event involving one or more rows of data. The width of the data block may be implicitly defined, based on the number of elements in the element block. In one example, the block operation may be implemented for a scalar, or single instruction multiple thread program as a built-in function.

Claims

1. An apparatus comprising:

a display;

a scalar module to define a plurality of execution elements, wherein two or more of the execution elements are to be grouped into an element block; and

a block module to be invoked by the scalar module and implement a block operation on a data block, wherein the block operation is to include a data transfer event involving system memory to be performed by the element block independently of shared local memory, and wherein the display is to render data based on the block operation.

2. The apparatus of claim 1, wherein the block operation is to include a data transfer event involving system memory to be performed by the element block using one memory address.

3. The apparatus of claim 1, wherein the block operation is to include one or more of a load operation, a store operation, a transform operation, a motion estimation operation, and a feature extraction operation.

4. The apparatus of claim 3, further including a data register, wherein the block operation is to include a data transfer event including the data register and excluding shared local memory to be performed by the element block.

5. The apparatus of claim 4, wherein the load operation is to include a load of the data block by the element block from the system memory directly to the data register, and the store operation is to include a store of the data block by the element block from the data register directly to the system memory.

6. The apparatus of claim 4, wherein the load operation is to include a load of the data block by the element block from an image in the system memory directly to the data register, and the store operation is to include a store by the element block of the data block from the data register directly to the image in the system memory.

7. The apparatus of claim 4, wherein the element block is to apply a filter weight for a convolve operation to generate modified data from the data block.

8. The apparatus of claim 4, wherein the element block is to determine a motion vector from the data block for the motion estimation operation, and wherein the motion vector is to be replicated across the entire register for each execution element or is to reside at one location in the register and is to be accessible to each execution element.

9. The apparatus of claim 1, wherein the width of the data block is to be implicitly defined based on the number of elements in the element block.

10. The apparatus of claim 1, wherein the block operation is to include a data transfer event involving two or more rows of data.

11. A computer readable storage medium comprising a set of instructions which, if executed by a processor, cause a computer to:

define a plurality of execution elements, wherein two or more of the execution elements are to be grouped into an element block; and

implement a block operation on a data block, wherein the block operation is to include a data transfer event involving system memory to be performed by the element block independently of shared local memory.

12. The medium of claim 11, wherein the block operation is to include a data transfer event involving system memory to be performed by the element block using one memory address for the element block.

13. The medium of claim 11, wherein the block operation is to include one or more of a load operation, a store operation, a transform operation, a motion estimation operation, and a feature extraction operation.

14. The medium of claim 13, wherein the block operation is to include a data transfer event including a data register and excluding shared local memory to be performed by the element block.

15. The medium of claim 14, wherein the load operation is to include a load of the data block by the element block from the system memory directly to the data register, and the store operation is to include a store of the data block by the element block from the data register directly to the system memory.

16. The medium of claim 14, wherein the load operation is to include a load of the data block by the element block from an image in the system memory directly to the data register, and the store operation is to include a store by the element block of the data block from the data register directly to the image in the system memory.

17. The medium of claim 14, wherein the element block is to apply a filter weight for a convolve operation to generate modified data from the data block.

18. The medium of claim 14, wherein the element block is to determine a motion vector from the data block for the motion estimation operation, and wherein the motion vector is to be replicated across the entire register for each execution element or is to reside at one location in the register and is to be accessible to each execution element.

19. The medium of claim 11, wherein:

the width of the data block is to be implicitly defined based on the number of elements in the element block;

or

the block operation is to include a data transfer event involving two or more rows of data.

20. A method comprising:

defining a plurality of execution elements, wherein two or more of the execution elements are grouped into an element block; and

implementing a block operation on a data block, wherein the block operation includes a data transfer event involving system memory performed by the element block independently of shared local memory.

21. The method of claim 20, wherein the block operation includes a data transfer event involving system memory performed by the element block using one memory address for the element block.

22. The method of claim 20, wherein the block operation includes one or more of a load operation, a store operation, a transform operation, a motion estimation operation, and a feature extraction operation.

23. The method of claim 22, wherein the block operation includes a data transfer event including a data register and excluding shared local memory performed by the element block.

24. The method of claim 23, wherein:

the load operation includes a load of the data block by the element block from the system memory directly to the data register, and the store operation includes a store of the data block by the element block from the data register directly to the system memory;

the load operation includes a load of the data block by the element block from an image in the system memory directly to the data register, and the store operation includes a store by the element block of the data block from the data register directly to the image in the system memory;

the element block applies a filter weight for a convolve operation to generate modified data from the data block;

or

the element block determines a motion vector from the data block for the motion estimation operation, wherein the motion vector is replicated across the entire register for each execution element or resides at one location in the register and is accessible to each execution element.

25. The method of claim 20, wherein:

the width of the data block is implicitly defined based on the number of elements in the element block;

or

the block operation includes a data transfer event involving two or more rows of data.