Spacers with Rectangular Profile and Methods of Forming the Same

• US 20150162416A1
• Filed: 12/05/2013
• Published: 06/11/2015
• Est. Priority Date: 12/05/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chang, Yu-Sheng, Lee, Chung-Ju, Bao, Tien-I
• Granted Patent: US 9,614,053 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02118 carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC polymers per se C08G, photoresist per se G03F
• CPC Class Codes: H01L 21/0212 the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/3086 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/823425 manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
• CPC Class Codes: H01L 21/823468 with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
• CPC Class Codes: H01L 29/4983 with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
• CPC Class Codes: H01L 29/6653 using the removal of at least part of spacer, e.g. disposable spacer
• CPC Class Codes: H01L 29/6656 using multiple spacer layers, e.g. multiple sidewall spacers
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence

Abstract

A method includes forming a spacer layer on a top surface and sidewalls of a patterned feature, wherein the patterned feature is overlying a base layer, A protection layer is formed to contact a top surface and a sidewall surface of the spacer layer. The horizontal portions of the protection layer are removed, wherein vertical portions of the protect layer remain after the removal. The spacer layer is etched to remove horizontal portions of the spacer layer, wherein vertical portions of the spacer layer remain to form parts of spacers.

Claims

1. A method comprising:

forming a spacer layer on a top surface and sidewalls of a patterned feature, wherein the patterned feature is overlying a base layer;

forming a protection layer contacting a top surface and a sidewall surface of the spacer layer;

removing horizontal portions of the protection layer, wherein vertical portions of the protect layer remain after the removing; and

etching the spacer layer to remove horizontal portions of the spacer layer, wherein vertical portions of the spacer layer remain to form parts of spacers.

2. The method of claim 1, wherein the forming the protection layer comprises performing a nitridation to convert a surface layer of the spacer layer into the protection layer.

3. The method of claim 1, wherein the forming the protection layer comprises performing an oxidation to convert a surface layer of the spacer layer into the protection layer.

4. The method of claim 1, wherein the forming the protection layer comprises depositing the protection layer over the spacer layer, and wherein a process gas for the depositing comprises CH₄ and N₂.

5. The method of claim 1, wherein the forming the protection layer comprises depositing the protection layer over the spacer layer, and wherein a process gas for the depositing comprises CH₂F₂.

6. The method of claim 1 further comprising:

after the etching the spacer layer, removing the patterned feature;

etching the base layer to form a trench in the base layer, wherein the spacers are used as an etching mask; and

filling a material different from a material of the base layer to form a feature in the trench.

7. The method of claim 1, wherein the patterned feature comprises a gate dielectric and a gate electrode over the gate dielectric, and wherein the base layer comprises a semiconductor substrate.

8. A method comprising:

forming a spacer layer on a top surface and sidewalls of a patterned feature, wherein the patterned feature is overlying a base layer;

reacting a surface layer of the spacer layer with a process gas to generate a protection layer, wherein a bottom layer of the spacer layer remains un-reacted with the process gas;

removing horizontal portions of the protection layer using a first etchant gas, wherein vertical portions of the protect layer remain after the removing; and

etching the spacer layer to remove horizontal portions of the spacer layer using a second etchant gas different from the first etchant gas, wherein vertical portions of the spacer layer remain to form parts of spacers.

9. The method of claim 8, wherein after the etching the spacer layer, vertical portions of the protect layer remain to form the spacers with the vertical portions of the spacer layer.

10. The method of claim 8, wherein the reacting the surface layer of the spacer layer with the process gas comprises oxidizing the surface layer of the spacer layer in an oxygen-containing process gas, and wherein the protection layer comprises an oxide of the spacer layer.

11. The method of claim 8, wherein the reacting the surface layer of the spacer layer with the process gas comprises nitridizing the surface layer of the spacer layer in a nitride-containing process gas, and wherein the protection layer comprises a nitride of the spacer layer.

12. The method of claim 8, wherein during the removing the horizontal portions of the protection layer, a first etching rate of the protection layer is higher than a second etching rate of the spacer layer, and wherein during the etching the spacer layer, a third etching rate of the protection layer is lower than a fourth etching rate of the spacer layer.

13. The method of claim 8, wherein both the removing the horizontal portions of the protection layer and the etching the spacer layer comprise anisotropic etching.

14. The method of claim 8 further comprising:

after the etching the spacer layer, removing the patterned feature;

etching the base layer to form a trench in the base layer, wherein the spacers are used as an etching mask; and

filling a material different from a material of the base layer to form features in the trenches.

15. A device comprising:

a semiconductor substrate;

a gate stack over the semiconductor substrate;

a gate spacer on a sidewall of the gate stack, wherein the gate spacer comprises;

an inner portion having an inner sidewall contacting a sidewall of the gate stack; and

an outer portion comprising;

an inner edge contacting an outer edge of the inner portion, wherein the inner portion and the outer portion comprise different materials, and wherein the out portion has a substantially uniform thickness; and

a bottom surface over and spaced apart from the semiconductor substrate; and

a source/drain region adjacent to the gate spacer.

16. The device of claim 15, wherein the inner portion has a bottom surface contacting a top surface of the semiconductor substrate, and wherein the bottom surface of the outer portion is higher than the bottom surface of the inner portion.

17. The device of claim 15, wherein the inner portion of the gate spacer comprises an oxide, and the outer portion of the gate spacer comprises nitrogen in addition to the oxide.

18. The device of claim 15, wherein the inner portion of the gate spacer comprises a nitride, and the outer portion of the gate spacer comprises oxygen in addition to the nitride.

19. The device of claim 15, wherein the outer portion of the gate spacer comprises a carbon and nitrogen containing polymer.

20. The device of claim 15, wherein the outer portion of the gate spacer comprises a carbon and fluorine containing polymer.