FINFET WITH ISOLATION
First Claim
1. A method for forming a device comprising:
- providing a substrate prepared with a device region;
forming a fin in the device region, the fin includes top and bottom portions;
forming an isolation layer on the substrate, wherein the isolation layer has a top isolation surface disposed below a top fin surface, leaving an upper fin portion exposed;
forming at least one isolation buffer in the bottom fin portion, leaving the top fin portion crystalline, the top fin portion serves as a body of a fin type transistor;
forming source/drain (S/D) regions in the top portions of the fin; and
forming a gate wrapping around the fin.
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Accused Products
Abstract
Devices and methods for forming a device are presented. The method includes providing a substrate prepared with a device region. A fin is formed in the device region. The fin includes top and bottom portions. An isolation layer is formed on the substrate. The isolation layer has a top isolation surface disposed below a top fin surface, leaving an upper fin portion exposed. At least one isolation buffer is formed in the bottom fin portion, leaving the top fin portion crystalline, the top fin portion serves as a body of a fin type transistor. Source/drain (S/D) regions are formed in the top portions of the fin and a gate wrapping around the fin is provided.
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Citations
20 Claims
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1. A method for forming a device comprising:
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providing a substrate prepared with a device region; forming a fin in the device region, the fin includes top and bottom portions; forming an isolation layer on the substrate, wherein the isolation layer has a top isolation surface disposed below a top fin surface, leaving an upper fin portion exposed; forming at least one isolation buffer in the bottom fin portion, leaving the top fin portion crystalline, the top fin portion serves as a body of a fin type transistor; forming source/drain (S/D) regions in the top portions of the fin; and forming a gate wrapping around the fin. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A device comprising:
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a substrate prepared with a device region; a fin in the device region, the fin includes top and bottom portions; an isolation layer on the substrate, wherein the isolation layer has a top isolation surface disposed below a top fin surface, leaving an upper fin portion exposed; at least one isolation buffer in the bottom fin portion, leaving the top fin portion crystalline, the top fin portion serves as a body of a fin type transistor; source/drain (S/D) regions disposed in the top portions of the fin; and a gate wrapping around the fin. - View Dependent Claims (17, 18, 19, 20)
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Specification