CIRCUIT AND OPERATING METHOD OF PLL
First Claim
1. A phase locked loop (PLL), comprising:
- a voltage controlled oscillator (VCO) configured to generate a first oscillating signal and a second oscillating signal according to a VCO control signal, the second oscillating signal being an inverted version of the first oscillating signal, the first and second oscillating signals having a predetermined VCO period (TVCO);
a loop filter configured to output the VCO control signal by low-pass filtering a signal at an input node of the loop filter; and
a first feedback control unit having a first feedback control output node coupled to the input node of the loop filter, the first feedback control unit being configured toapply a first predetermined amount of current (ICP1), along a first current direction, to the first feedback control output node during a variable period of time, the variable period of time being defined by a reference signal, the first oscillating signal, and the second oscillating signal, the reference signal having a predetermined reference period (TREF), a predetermined ratio of TREF to TVCO being (N+f), N being a positive integer, and f being a fraction; and
apply one of K second predetermined amounts of current (ICP2[0;
K−
1]), along a second current direction opposite the first current direction, to the first feedback control output node during a predetermined period of time, the K second predetermined amounts of current being selected in a sequential and repetitive manner, K being a positive integer, and (K·
f) being an integer.
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Abstract
A phase locked loop (PLL) includes a voltage controlled oscillator (VCO), a loop filter, and a feedback control unit. The VCO is configured to generate a first oscillating signal and a second oscillating signal according to a VCO control signal. The loop filter is configured to output the VCO control signal by low-pass filtering a signal at an input node of the loop filter. The feedback control unit has an output node coupled to the input node of the loop filter, the feedback control unit is configured to apply a first predetermined amount of current, along a first current direction, to the first feedback control output node during a variable period of time; and to apply one of K second predetermined amounts of current, along a second current direction opposite the first current direction, to the first feedback control output node during a predetermined period of time.
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Citations
20 Claims
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1. A phase locked loop (PLL), comprising:
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a voltage controlled oscillator (VCO) configured to generate a first oscillating signal and a second oscillating signal according to a VCO control signal, the second oscillating signal being an inverted version of the first oscillating signal, the first and second oscillating signals having a predetermined VCO period (TVCO); a loop filter configured to output the VCO control signal by low-pass filtering a signal at an input node of the loop filter; and a first feedback control unit having a first feedback control output node coupled to the input node of the loop filter, the first feedback control unit being configured to apply a first predetermined amount of current (ICP1), along a first current direction, to the first feedback control output node during a variable period of time, the variable period of time being defined by a reference signal, the first oscillating signal, and the second oscillating signal, the reference signal having a predetermined reference period (TREF), a predetermined ratio of TREF to TVCO being (N+f), N being a positive integer, and f being a fraction; and apply one of K second predetermined amounts of current (ICP2[0;
K−
1]), along a second current direction opposite the first current direction, to the first feedback control output node during a predetermined period of time, the K second predetermined amounts of current being selected in a sequential and repetitive manner, K being a positive integer, and (K·
f) being an integer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A control unit, comprising:
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an output node; a phase detector configured to generate a set of control signals based on a reference signal, a first oscillating signal, and a second oscillating signal, the reference signal having a predetermined reference period (TREF), the second oscillating signal being an inverted version of the first oscillating signal, the first and second oscillating signals having a predetermined VCO period (TVCO), a predetermined ratio of TREF to TVCO being (N+f), N being a positive integer, and f being a fraction; and a charge pump, comprising; a first current source configured to provide a first predetermined amount of current (ICP1) having a first current direction with respect to the output node; a first switch between the output node and the first current source and controlled by a first one of the set of control signals; a second current source configured to provide one of K second predetermined amounts of current (ICP2[0;
K−
1]) having a second current direction with respect to the output node, K being a positive integer, and (K·
f) being an integer; anda second switch between the first feedback control output node and the second current source and controlled by a second one of the set of control signals. - View Dependent Claims (15, 16)
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17. A method of operating a phase locked loop (PLL), the method comprising:
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setting a first current source to have a first predetermined amount of current (ICP1) having a first current direction with respect to a control output node, K being a positive integer; during a (k+1)-th cycle of a reference signal, k being an integer from 0 to K−
1, setting a second current source to have (k+1)-th of K predetermined amounts of current (ICP2[0;
K−
1]) having a second current direction with respect to the control output node,applying the first current to the control output node during a variable period of time defined according to a reference signal, a first oscillating signal, and a second oscillating signal, the reference signal having a predetermined reference period (TREF), the second oscillating signal being an inverted version of the first oscillating signal, the first and second oscillating signals having a predetermined VCO period (TVCO), a predetermined ratio of TREF to TVCO being (N+f), N being a positive integer, f being a fraction, and (K·
f) being an integer;applying the second current to the control output node during a predetermined period of time; and controlling a voltage controlled oscillator to output the first and second oscillating signals according to a voltage level at the control output node. - View Dependent Claims (18, 19, 20)
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Specification