NON-PREEMPTION OF A GROUP OF INTERCHANGEABLE TASKS IN A COMPUTING DEVICE

• US 20150169364A1
• Filed: 12/12/2013
• Published: 06/18/2015
• Est. Priority Date: 12/12/2013
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Pai, Ramachandra N., Wang, Yun, Yang, Wei, Xiao, Guang Rong
• Granted Patent: US 9,632,844 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
• CPC Class Codes: G06F 9/54 Interprogram communication

Abstract

A non-preemption task group apparatus comprises a scheduling module that identifies a first task that is one of executing and scheduled to execute on a processor during a first time slice and a second task to be executed on a processor during a subsequent time slice, the first slice occurring before the subsequent slice, a relationship module that compares the first task to the second task, and an examining module that identifies whether the first task and the second task are interchangeable tasks based on the comparison, wherein the first task executes during the subsequent time slice in response to the first task and the second task being identified as interchangeable.

Claims

1-12. -12. (canceled)

13. An apparatus comprising:

a scheduling module that identifies a first task that is one of executing and scheduled to execute on a processor during a first time slice and a second task to be executed on the processor during a subsequent time slice, the first time slice occurring before the subsequent time slice;

a relationship module that compares the first task to the second task; and

an examining module that identifies whether the first task and the second task are interchangeable tasks based on the comparison,

wherein the first task executes during the subsequent time slice in response to the first task and the second task being identified as interchangeable.

14. The apparatus of claim 13, wherein the second task executes during the subsequent time slice in response to identifying that the first task and the second task are not interchangeable tasks.

15. The apparatus of claim 13, wherein the relationship module compares a first task group identifier of the first task to a second task group identifier of the second task, and wherein the examining module determines whether the first task group identifier matches the second task group identifier.

16. The apparatus of claim 13, wherein the examining module identifies whether the first task and the second task belong to a common group of interchangeable tasks.

17. The apparatus of claim 13, further comprising:

a task grouping module that identifies at least two interchangeable tasks scheduled to execute on the processor and associates an indicator with the at least two interchangeable tasks, the indicator designating that the at least two tasks are part of a common group of interchangeable tasks,

wherein the examining module evaluates the indicator to determine whether the first task and the second task are part of the group of interchangeable tasks.

18. The apparatus of claim 17, wherein the scheduling module further comprises a task queuing module that assigns the at least two interchangeable tasks to adjacent time slices.

19. The apparatus of claim 13, further comprising a load assessing module that identifies a processor load, wherein the relationship module compares the first task to the second task in response to the processor load being identified as one of moderate and heavy.

21. The apparatus of claim 13, wherein during a time when the first task is executing on the processor, further comprising:

receiving an interrupt signal at an end of the first time slice; and

identifying whether the first task and the second task are interchangeable in response to receiving the interrupt signal.

22. The apparatus of claim 13, further comprising:

identifying at least two interchangeable tasks scheduled for execution on the processor; and

assigning consecutive time slices to the at least two interchangeable tasks.

23. The apparatus of claim 22, further comprising suppressing delivery of an interrupt signal during consecutive times slices allocated to the at least two interchangeable tasks.

24. The apparatus of claim 13, wherein the processor is a central processing unit having a plurality of processing cores, and wherein the first task and the second task are assigned to a common processing core of the plurality of processing cores.

25. The apparatus of claim 13, comprising allocating time slices equally to tasks scheduled to execute on the processor, the tasks scheduled including the first task and the second task.

20. A computer program product comprising:

at least one computer readable storage medium having computer readable program code embodied therewith, the computer readable program code, when read by a processor, configured to;

identify a first task that is one of executing and scheduled to execute on a processor during a first time slice;

identify a second task to be executed on the processor during a subsequent time slice, the first time slice occurring before the subsequent time slice;

compare the first task to the second task;

identify whether the first task and the second task are interchangeable tasks based on the comparison; and

execute the first task during the subsequent time slice in response to the first task and the second task being identified as interchangeable.

26. The computer program product of claim 20, further comprising executing the second task during the subsequent time slice in response to identifying that the first task and the second task are not interchangeable tasks.

27. The computer program product of claim 20, wherein comparing the first task to the second task comprises comparing a first task group identifier of the first task to a second task group identifier of the second task, and wherein identifying whether the first task and the second task are interchangeable comprises determining whether the first task group identifier matches the second task group identifier.

28. The computer program product of claim 20, wherein identifying whether the first task and the second task are interchangeable tasks comprises identifying whether the first task and the second task belong to a common group of interchangeable tasks.

29. The computer program product of claim 20, further comprising:

identifying at least two interchangeable tasks scheduled to execute on the processor; and

associating an indicator with the at least two interchangeable tasks, the indicator designating that the at least two tasks are part of a common group of interchangeable tasks,

wherein identifying whether the first task and the second task are interchangeable tasks comprises evaluating the indicator to determine whether the first task and the second task are part of the group of interchangeable tasks.

30. The computer program product of claim 29, further comprising scheduling the at least two interchangeable tasks to adjacent time slices.

31. The computer program product of claim 20, wherein during a time when the first task is executing on the processor, further comprising:

receiving an interrupt signal at an end of the first time slice; and

identifying whether the first task and the second task are interchangeable in response to receiving the interrupt signal.

32. The computer program product of claim 20, further comprising:

identifying at least two interchangeable tasks scheduled for execution on the processor; and

assigning consecutive time slices to the at least two interchangeable tasks.