ABSTRACTING A MULTITHREADED PROCESSOR CORE TO A SINGLE THREADED PROCESSOR CORE
First Claim
Patent Images
1. A method comprising:
- providing, by an operating system, instructions for execution by plural hardware threads of a multithreaded core of a processor, the plural hardware threads appearing as separate logical processors to the operating system;
converting, by an abstraction layer, respective identifiers of the plural hardware threads to a core identifier representing the core;
presenting, by the abstraction layer, the core identifier to a user application to hide the plural hardware threads from the user application, and to present the core as a single-threaded core to the user application.
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Abstract
An operating system provides instructions for execution by plural hardware threads of a multithreaded core of a processor, the plural hardware threads appearing as separate logical processors to the operating system. An abstraction layer converts respective identifiers of the plural hardware threads to a core identifier representing the core. The abstraction layer presents the core identifier to a user application to hide the plural hardware threads from the user application, and to present the core as a single-threaded core to the user application.
8 Citations
20 Claims
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1. A method comprising:
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providing, by an operating system, instructions for execution by plural hardware threads of a multithreaded core of a processor, the plural hardware threads appearing as separate logical processors to the operating system; converting, by an abstraction layer, respective identifiers of the plural hardware threads to a core identifier representing the core; presenting, by the abstraction layer, the core identifier to a user application to hide the plural hardware threads from the user application, and to present the core as a single-threaded core to the user application. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A system comprising:
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a processor comprising a multithreaded core that includes plural of hardware threads; an operating system, the plural hardware threads appearing as plural logical processors to the operating system; and an abstraction layer to; convert respective identifiers of the plural hardware threads to a core identifier representing the core, and present the core identifier to a user application to hide the plural hardware threads from the user application, and to present the core as a single-threaded core to the user application. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A non-transitory machine-readable storage medium storing program code that upon execution cause a system to:
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provide, by an operating system, instructions for execution by plural hardware threads of a multithreaded core of a processor, the plural hardware threads appearing as separate logical processors to the operating system; convert, by an abstraction layer, respective identifiers of the plural hardware threads to a core identifier representing the core; and present, by the abstraction layer, the core identifier to a user application to hide the plural hardware threads from the user application, and to present the core as a single-threaded core to the user application. - View Dependent Claims (19, 20)
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Specification