USE OF DIELECTRIC FILM TO REDUCE RESISTIVITY OF TRANSPARENT CONDUCTIVE OXIDE IN NANOWIRE LEDS

• US 20150171280A1
• Filed: 12/10/2014
• Published: 06/18/2015
• Est. Priority Date: 12/13/2013
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Glo AB (Shoei Electronic Materials, Inc.)
• Inventors: HERNER, Scott Brad, THOMPSON, Daniel Bryce
• Granted Patent: US 9,972,750 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: B82Y 40/00 Manufacture or treatment of nanostructures
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/42 Transparent materials
• CPC Class Codes: Y10S 977/762 Nanowire or quantum wire, i.e. axially elongated structure having two dimensions of 100 nm or less
• CPC Class Codes: Y10S 977/891 Vapor phase deposition
• CPC Class Codes: Y10S 977/95 Electromagnetic energy

Abstract

Various embodiments include methods of fabricating light emitting diode (LED) devices, such as nanowire LED devices, that include forming a layer of a transparent, electrically conductive material over at least a portion of a non-planar surface of an LED device, and depositing a layer of a dielectric material over at least a portion of the layer of transparent conductive material, wherein depositing the layer of dielectric material comprises at least one of: (a) depositing the layer using a chemical vapor deposition (CVD) process, (b) depositing the layer at a temperature of 200° C. or more, and (c) depositing the layer using one or more chemically active precursors for the dielectric material.

Claims

1. A method of fabricating a light emitting diode (LED) device, comprising:

forming a layer of a transparent, electrically conductive material over at least a portion of a non-planar surface of the LED device; and

depositing a layer of a dielectric material over at least a portion of the layer of transparent conductive material, wherein depositing the layer of dielectric material comprises at least one of;

(a) depositing the layer using a chemical vapor deposition (CVD) process;

(b) depositing the layer at a temperature of 200°

C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material.

2. The method of claim 1, wherein depositing the layer of dielectric material comprises depositing the layer at a temperature of 200°

C. to 600°

C.

3. The method of claim 1, further comprising:

forming a plurality of first conductivity type semiconductor nanowire cores located over a support; and

forming a plurality of second conductivity type semiconductor shells extending over and around the respective nanowire cores to form the LED device having a non-planar surface, wherein the layer of transparent conductive material is formed over the plurality of second conductivity type semiconductor shells.

4. The method of claim 1, wherein the layer of transparent, electrically conductive material comprises a transparent conductive oxide (TCO).

5. The method of claim 4, wherein the transparent conductive oxide comprises indium tin oxide (ITO).

6. The method of claim 4, wherein the transparent conductive oxide comprised aluminium-doped zinc oxide (AZO).

7. The method of claim 1, wherein the dielectric material comprises at least one of SiO₂, SiN and Al₂O₃.

8. The method of claim 1, wherein the dielectric material layer has an optical transmissivity greater than 85% for at least one emission wavelength of the LED device.

9. The method of claim 1, wherein the dielectric material layer decreases a resistivity of the layer of transparent, electrically conductive material to a value that is 50% or less than the resistivity of the layer of transparent, electrically conductive material in the device without the dielectric material layer.

10. The method of claim 1, wherein depositing the layer of dielectric material comprises (a) depositing the layer using the chemical vapor deposition (CVD) process.

11. The method of claim 1, wherein depositing the layer of dielectric material comprises (b) depositing the layer at the temperature of 200°

C. or more.

12. The method of claim 11, further comprising:

placing the LED device in a chamber; and

controlling a flow of a gas comprising the one or more chemically active precursors within the chamber to deposit the layer of dielectric material.

13. The method of claim 12, further comprising controlling a temperature within the chamber so that a temperature within the chamber is 200°

C. to 600°

C. during the deposition of the dielectric material.

14. The method of claim 1, wherein depositing the layer of dielectric material comprises (c) depositing the layer using one or more chemically active precursors for the dielectric material.

15. The method of claim 14, wherein the one or more chemically active precursors for the dielectric material comprise at least one of SiH₄, dichlorosilane (DCS), O₂, tetraethylorthosilicate (TEOS), O₃, H₂SiCl₂, NH₃, AlCl₃, trimethylaluminum, aluminium alkoxide, aluminium acetylacetonate, CO₂, N₂O and H₂O.

16. The method of claim 1, wherein depositing the layer of dielectric material comprises at least two of:

(a) depositing the layer using the chemical vapor deposition (CVD) process;

(b) depositing the layer at the temperature of 200°

C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material.

17. The method of claim 1, wherein depositing the layer of dielectric material comprises all three of:

(a) depositing the layer using the chemical vapor deposition (CVD) process;

(b) depositing the layer at the temperature of 200°

C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material.

18. A light emitting diode (LED) device comprising:

a non-planar semiconductor surface;

a transparent, electrically conductive material over at least a portion of the non-planar semiconductor surface; and

a dielectric material over at least a portion of the transparent conductive material, wherein the dielectric material decreases a resistivity of the transparent, electrically conductive material by at least 50% relative to the resistivity of the transparent, electrically conductive material in the device without the dielectric material layer.

19. The LED device of claim 18, wherein the transparent, electrically conductive material comprises indium tin oxide having a sheet resistance of less than 100Ω

.

20. The LED device of claim 18, wherein the device further comprises:

a plurality of first conductivity type semiconductor nanowire cores located over a support; and

a plurality of second conductivity type semiconductor shells extending over and around the respective nanowire cores, wherein the transparent, electrically conductive material is located over at least a portion of the surface of the second conductivity type semiconductor shells.

21. The LED device of claim 20, further comprising:

a first metal contact located over the support and electrically connected to the first conductivity type semiconductor nanowire cores; and

a second metal contact located over the transparent, electrically conductive material and electrically connected to the second conductivity type semiconductor nanowire shells, wherein an amount of light emitted by the LED device proximate to the first metal contact is within about 25% of an amount of light emitted by the LED device proximate to the second metal contact.

22. A method of fabricating a semiconductor device, comprising:

forming a layer of a transparent, electrically conductive material over at least a portion of the semiconductor device; and

depositing a layer of a dielectric material over at least a portion of the layer of transparent conductive material,

wherein depositing the layer of dielectric material comprises at least one of;

(a) depositing the layer using a chemical vapor deposition (CVD) process;

(b) depositing the layer at a temperature of 200°

C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material; and

wherein the dielectric material decreases a resistivity of the transparent, electrically conductive material to a value that is 50% or less of the resistivity of the transparent, electrically conductive material in the device without the dielectric material layer.