LOW DRIFT VOLTAGE REFERENCE

• US 20150177771A1
• Filed: 12/20/2013
• Published: 06/25/2015
• Est. Priority Date: 12/20/2013
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Analog Devices, Inc.
• Inventors: MARINCA, Stefan
• Granted Patent: US 9,448,579 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G05F 3/185 and field-effect transistors

Abstract

Circuits and method for providing voltage reference circuits that include low drift over time and lower operating voltages are provided. Generally, it is desirable that a reference circuit provide an accurate and precise reference over time. The voltage reference circuits described can provide for good long term stability, operation at lower voltages than prior designs, consistent output voltage with reduced variability due to process changes and mismatches, low noise in the reference voltage, and other advantages.

Claims

1. A voltage reference circuit comprising a zener diode coupled to circuit elements configured to generate a negative base-emitter voltage differential, Δ

Vbe, component, the negative Δ

Vbe component compensating for positive temperature coefficient response characteristics of the zener diode to provide a voltage reference at an output of the voltage reference circuit.

2. The voltage reference circuit of claim 1 comprising a first negative base-emitter voltage differential, Δ

Vbe, block and a second negative base-emitter voltage differential, Δ

Vbe, block, the first block and second block being cascaded relative to one another.

3. The voltage reference circuit of claim 1 wherein the circuit elements comprise a first bipolar transistor having a first emitter area and a second bipolar transistor having a second different emitter area.

4. The voltage reference circuit of claim 3 comprising a third bipolar transistor coupled to each of a base and collector of the first bipolar transistor.

5. The voltage reference circuit of claim 3 comprising a MOS device coupled to each of the first bipolar transistor and the second bipolar transistor such that a base-emitter voltage difference between each of the first bipolar transistor and second bipolar transistor is reflected across the MOS device.

6. The voltage reference circuit of claim 1 wherein the circuit elements are arranged in a cell, the cell comprising:

a plurality of bipolar transistors arranged in first, second and third arms of the cell and configured to generate a proportional to absolute temperature voltage at an output of the cell that is dependent on individual ones of the plurality of bipolar transistors, and

wherein each of the first arm, second arm and third arms are coupled to a single bias current such that the bias current is divided into each of the arms and each of the arms compensates for base current variations in the other of the arms.

7. The voltage reference circuit of claim 6 wherein the proportional to absolute temperature voltage provided at the output of the cell is related to a base-emitter voltage difference, Δ

Vbe, generated from an emitter ratio of a first set of bipolar transistors operating at a first collector current density and a second set of bipolar transistors operating at a second, lower, collector current density, the cell being coupled to the zener diode so as to provide the Δ

Vbe as a negative Δ

Vbe contribution to balance positive temperature coefficient response characteristics of the zener diode.

8. The voltage reference circuit of claim 7 comprising a MOS device and wherein the base-emitter voltage difference generated from the emitter area ratio is reflected across the MOS device to the output of the cell.

9. The voltage reference circuit of claim 6 wherein each arm comprises at least one transistor provided in a PNP configuration, the cell being configured such that emitters of individual PNP transistors of each of the first, second and third arms are coupled to a common node that is biased by the same bias current.

10. The voltage reference circuit of claim 9 wherein a first arm of the cell comprises a PNP transistor having a unity emitter size and a second arm of the circuit comprises a PNP transistor having a multiple, n, emitter size, the circuit being configured to generate a voltage at the output of the cell that is first order independent of the bias current and proportional to the multiple n.

11. The voltage reference circuit of claim 9 comprising a plurality of bipolar transistors configured in an NPN configuration and wherein each of a first arm and a second arm of the cell comprises at least one NPN configured transistor and at least one PNP configured transistor, the first arm operating at a first collector current density and the second arm operating at a second, lower, collector current density, the circuit being configured to generate a base emitter voltage difference at the output of the cell.

12. The voltage reference circuit of claim 11 wherein the NPN configured transistors have a different emitter area to the PNP configured transistors.

13. The voltage reference circuit of claim 6 wherein the bias current is provided by a current source coupled to a supply voltage of the circuit.

14. The voltage reference circuit of claim 6 wherein individual transistors of the third arm are provided in a diode connected configuration.

15. The voltage reference circuit of claim 1 comprising a trimming node whereby a trimming current can be introduced into the circuit to vary the temperature coefficient characteristics of the circuit.

16. The voltage reference circuit of claim 15 wherein the trimming current is either added into the circuit or subtracted out of the circuit to vary the temperature coefficient characteristics of the circuit.

17. The voltage reference circuit of claim 16 wherein the trimming current is coupled to the circuit elements configured to generate a negative base-emitter voltage differential, Δ

Vbe, component.

18. A voltage reference circuit comprising:

a first set of circuit elements comprising a zener diode and configured to generate a proportional to absolute temperature, PTAT, voltage;

a second set of circuit elements comprising elements bipolar transistors configured to generate a negative base-emitter voltage differential having a complimentary to absolute temperature, CTAT, voltage form,

the circuit coupling each of the first and second set of circuit elements to generate a voltage reference at the output of the circuit.

19. The voltage reference circuit of claim 18 wherein the second set of circuit elements are arranged in a cell, the cell comprising:

a plurality of bipolar transistors arranged in first, second and third arms of the cell and configured to generate a proportional to absolute temperature voltage at an output of the cell that is dependent on individual ones of the plurality of bipolar transistors, and

wherein each of the first arm, second arm and third arms are coupled to a single bias current such that the bias current is divided into each of the arms and each of the arms compensates for base current variations in the other of the arms.

20. The voltage reference circuit of claim 19 wherein the proportional to absolute temperature voltage provided at the output of the cell is related to a base-emitter voltage difference, Δ

Vbe, generated from an emitter ratio of a first set of bipolar transistors operating at a first collector current density and a second set of bipolar transistors operating at a second, lower, collector current density, the cell being coupled to the first set of circuit elements so as to provide the Δ

Vbe as a negative Δ

Vbe contribution to the positive temperature coefficient response characteristics of the zener diode.

21. A method of providing a voltage reference comprising:

Coupling a zener diode to a plurality of bipolar transistors, the bipolar transistors being configured to generate a negative base-emitter voltage differential having a complimentary to absolute temperature, CTAT, voltage form which compensates for a proportional to absolute temperature, PTAT, temperature coefficient of the zener diode to provide at an output of the circuit a voltage reference having a first order temperature insensitivity.