IMAGE SENSOR AND IMAGE PROCESSING SYSTEM

• US 20150181147A1
• Filed: 09/24/2012
• Published: 06/25/2015
• Est. Priority Date: 08/03/2012
• Status: Active Grant

• Current Assignee: Brigates Microelectronics (Kunshan) Co., Ltd.
• Original Assignee: Brigates Microelectronics (Kunshan) Co., Ltd.
• Inventors: Luo, Wenzhe, Hao, Xiujie, Dong, Dexing
• Granted Patent: US 9,462,203 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H04N 25/53 Control of the integration time
• CPC Class Codes: H04N 25/532 by controlling global shutters in CMOS SSIS
• CPC Class Codes: H04N 25/74 Circuitry for scanning or addressing the pixel array
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/766 comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power
• CPC Class Codes: H04N 25/779 Circuitry for scanning or addressing the pixel array
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

An image sensor and an image processing system. The image sensor comprises: a CMOS photosensitive array used for converting an optical signal into an electrical signal; a control signal conversion circuit used for converting into a second control signal a first control signal for driving a CCD photosensitive array to operate, the first control signal at least comprising a vertical transfer signal, a horizontal transfer signal, an electronic shutter signal and a read-out clock signal, and the second control signal at least comprising a column address signal, a row reset control signal and a row read-out control signal; a row selection circuit used for generating a row reset signal according to the row reset control signal and generating a row read-out signal according to the row read-out control signal; and a column selection circuit used for conducting column gating on the CMOS photosensitive array under the control of the column address signal and outputting a column read-out signal. The technical solution of the present invention achieves the compatibility substitution of a CCD image sensor and a CMOS image sensor.

Claims

1. An image sensor, comprising:

a Complementary Metal Oxide Semiconductor (CMOS) photosensitive array, a row selection circuit, a column selection circuit and a control signal conversion circuit,

wherein the CMOS photosensitive array is adapted for converting optical signals to electrical signals;

wherein the control signal conversion circuit is adapted for converting a first set of control signals to a second set of control signals, the first set of control signals are adapted for driving a Charge-Coupled Device (CCD) photosensitive array and comprise at least a vertical transfer signal, a horizontal transfer signal, an electronic shutter signal and a readout clock signal, and the second set of control signals comprises at least a column address signal, a row reset control signal and a row readout control signal;

wherein the row selection circuit is adapted for receiving the row reset control signal and the row readout control signal, generating a row reset signal according to the row reset control signal, and generating a row readout signal according to the row readout control signal, wherein the row reset signal is adapted for controlling a reset operation of each row of the CMOS photosensitive array, and the row readout signal is adapted for controlling a readout operation of each row of the CMOS photosensitive array; and

wherein the column selection circuit is adapted for receiving the column address signal, performing a column strobe operation on the CMOS photosensitive array under control of the column address signal, and outputting a column readout signal.

2. The image sensor according to claim 1, wherein the CMOS photosensitive array is a four-transistor pixel array.

3. The image sensor according to claim 1, wherein the vertical transfer signal is a four-phase vertical transfer signal, and the horizontal transfer signal is a two-phase horizontal transfer signal.

4. The image sensor according to claim 3, wherein the control signal conversion circuit is adapted for converting one phase of the four-phase vertical transfer signal, one phase of the two-phase horizontal transfer signal, the electronic shutter signal and the readout clock signal of the first set of control signals to the second set of control signals.

5. The image sensor according to claim 1, wherein the control signal conversion circuit comprises a first detection unit, a second detection unit, a first counting unit, a second counting unit, a row address acquisition unit, a third counting unit and a column address acquisition unit,

wherein the first detection unit is adapted for detecting the electronic shutter signal of the first set of control signals and outputting a reset start signal;

wherein the second detection unit is adapted for detecting the readout clock signal of the first set of control signals and outputting a readout start signal;

wherein the first counting unit is adapted for receiving the reset start signal and the readout start signal, counting the vertical transfer signal to obtain a first count value after receiving the reset start signal, and re-counting the vertical transfer signal after receiving the readout start signal;

wherein the second counting unit is adapted for counting the vertical transfer signal to obtain a second count value after receiving the readout start signal, and re-counting the vertical transfer signal after receiving a next vertical readout start signal;

wherein the row address acquisition unit is adapted for receiving the first count value and the second count value, outputting a row reset control signal according to the first count value, and outputting a row readout control signal according to the second count value;

wherein the third counting unit is adapted for counting the horizontal transfer signal to obtain a third count value after receiving the readout start signal, and re-counting the horizontal transfer signal after receiving a next readout start signal; and

wherein the column address acquisition unit is adapted for receiving the third count value, and outputting a column address signal according to the third count value.

6. The image sensor according to claim 1, wherein the row selection circuit is a row decoder or a shift register.

7. The image sensor according to claim 1, wherein the column selection circuit is a column decoder or a shift register.

8. The image sensor according to claim 1, wherein the control signal conversion circuit comprises a first detection unit, a second detection circuit, a first timing unit, a second timing unit, a row address acquisition unit, a third timing unit and a column address acquisition unit,

wherein the first detection unit is adapted for detecting the electronic shutter signal of the first set of control signals and outputting a reset start signal;

wherein the second detection unit is adapted for detecting the readout clock signal of the first set of control signals and outputting a readout start signal;

wherein the first timing unit is adapted for detecting the vertical transfer signal after receiving the reset start signal, outputting a first signal and starting to time after detecting a first vertical transfer signal, and stopping timing to obtain a first time interval after detecting a second vertical transfer signal;

wherein the second timing unit is adapted for detecting the vertical transfer signal after receiving the readout start signal, and outputting a second signal after receiving a first vertical transfer signal;

wherein the row address acquisition unit is adapted for receiving the first signal, the first time interval and the second signal, generating a row reset control signal according to the first signal and the first time interval, and generating a row readout control signal according to the second signal and the first time interval;

wherein the third timing unit is adapted for detecting the horizontal transfer signal after receiving the readout start signal, outputting a third signal and starting to time after detecting a first horizontal transfer signal, and stopping timing to obtain a second time interval after detecting a second horizontal transfer signal; and

wherein the column address acquisition unit is adapted for receiving the third signal and the second time interval, and generating a column address signal according to the third signal and the second time interval.

9. The image sensor according to claim 1, further comprising:

an Analog to Digital Conversion (ADC) circuit adapted for converting the readout signal outputted by the column selection circuit to a digital signal.

10. An image processing system, comprising:

the image sensor according to claim 1.