CAMERAS AND METHODS WITH DATA PROCESSING, MEMORIES, AND AN IMAGE SENSOR WITH MULTIPLE DATA PORTS

• US 20150181148A1
• Filed: 08/12/2014
• Published: 06/25/2015
• Est. Priority Date: 12/23/2013
• Status: Active Grant

• Current Assignee: Alexander Krymski
• Original Assignee: Alexander Krymski
• Inventors: Krymski, Alexander, Slovick, Alexey
• Granted Patent: US 9,578,267 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

A camera includes a first processing device, a second processing device, and an image sensor that has a first plurality of ports connected to the first processing device and a second plurality of ports connected to the second processing device. A method includes providing first data from the first plurality of ports of the image sensor to the first processing device, and providing second data from the second plurality of ports of the image sensor to the second processing device. Another camera includes a first memory, a second memory, and an image sensor having a first plurality of ports connected to the first memory and a second plurality of ports connected to the second memory. A method includes providing first data from the first plurality of ports to the first memory and providing second data from the second plurality of ports to the second memory.

Claims

1. A camera, comprising:

a first processing device;

a second processing device; and

an image sensor comprising a first plurality of ports connected to the first processing device and a second plurality of ports connected to the second processing device.

2. The camera of claim 1,

wherein the first processing device comprises a field-programmable gate array;

and

wherein the second processing device comprises a field-programmable gate array.

3. The camera of claim 1,

wherein the first processing device comprises an application specific integrated circuit;

and

wherein the second processing device comprises an application specific integrated circuit.

4. The camera of claim 1,

wherein the first processing device is located to an opposite side of the image sensor from a side to which the second processing device is located.

5. The camera of claim 1, further comprising:

a first memory connected to the first processing device; and

a second memory connected to the second processing device.

6. The camera of claim 5,

wherein the first processing device is configured to perform image data pre-processing on first data received from the first plurality of ports of the image sensor and to provide first processed data resulting from the image data pre-processing of the first data to the first memory;

and

wherein the second processing device is configured to perform image data pre-processing on second data received from the second plurality of ports of the image sensor and to provide second processed data from the image data pre-processing of the second data to the second memory.

7. The camera of claim 5, further comprising:

a processing device connected to the first memory and to the second memory and to output interfaces of the camera.

8. The camera of claim 7,

wherein the processing device is configured to retrieve data from the first memory and the second memory and to provide the retrieved data to the output interfaces of the camera.

9. The camera of claim 1, further comprising:

a third processing device; and

a fourth processing device;

wherein the image sensor further comprises a third plurality of ports connected to the third processing device and a fourth plurality of ports connected to the fourth processing device.

10. The camera of claim 9,

wherein the first plurality of ports are located at a top-left portion of the image sensor;

wherein the second plurality of ports are located at a top-right portion of the image sensor;

wherein the third plurality of ports are located at a bottom-left portion of the image sensor; and

wherein the fourth plurality of ports are located at a bottom-right portion of the image sensor.

11. The camera of claim 9, further comprising:

a first memory connected to the first processing device;

a second memory connected to the second processing device;

a third memory connected to the third processing device; and

a fourth memory connected to the fourth processing device.

12. The camera of claim 11,

wherein the first processing device is configured to perform image data pre-processing on first data received from the first plurality of ports of the image sensor and to provide first processed data resulting from the image data pre-processing of the first data to the first memory;

wherein the second processing device is configured to perform image data pre-processing on second data received from the second plurality of ports of the image sensor and to provide second processed data resulting from the image data pre-processing of the second data to the second memory;

wherein the third processing device is configured to perform image data pre-processing on third data received from the third plurality of ports of the image sensor and to provide third processed data resulting from the image data pre-processing of the third data to the third memory; and

wherein the fourth processing device is configured to perform image data pre-processing on fourth data received from the fourth plurality of ports of the image sensor and to provide fourth processed data resulting from the image data pre-processing of the fourth data to the fourth memory.

13. The camera of claim 11, further comprising:

a processing device connected to the first memory and to the second memory and to the third memory and to the fourth memory and to output interfaces of the camera.

14. The camera of claim 13,

wherein the processing device is configured to retrieve data from the first memory and the second memory and the third memory and the fourth memory and to provide the retrieved data to the output interfaces of the camera.

15. The camera of claim 9,

wherein the first processing device comprises a field-programmable gate array with fewer number of pins than the number of ports of the image sensor.

16. A method in a camera, the method comprising:

providing first data from a first plurality of ports of an image sensor to a first processing device; and

providing second data from a second plurality of ports of the image sensor to a second processing device.

17. The method of claim 16, further comprising:

performing, by the first processing device, image data pre-processing on the first data to provide first processed data; and

performing, by the second processing device, image data pre-processing on the second data to provide second processed data.

18. The method of claim 17, further comprising:

providing the first processed data from the first processing device to a first memory; and

providing the second processed data from the second processing device to a second memory.

19. The method of claim 18, further comprising:

retrieving, by a processing device, the first processed data from the first memory; and

retrieving, by the processing device, the second processed data from the second memory.

20. The method of claim 16, further comprising:

providing third data from a third plurality of ports of the image sensor to a third processing device; and

providing fourth data from a fourth plurality of ports of the image sensor to a fourth processing device.

21. The method of claim 20, further comprising:

performing, by the first processing device, image data pre-processing on the first data to provide first processed data;

performing, by the second processing device, image data pre-processing on the second data to provide second processed data;

performing, by the third processing device, image data pre-processing on the third data to provide third processed data; and

performing, by the fourth processing device, image data pre-processing on the fourth data to provide fourth processed data.

22. The method of claim 21, further comprising:

providing the first processed data from the first processing device to a first memory;

providing the second processed data from the second processing device to a second memory;

providing the third processed data from the third processing device to a third memory; and

providing the fourth processed data from the fourth processing device to a fourth memory.

23. The method of claim 22, further comprising:

retrieving, by a processing device, the first processed data from the first memory;

retrieving, by the processing device, the second processed data from the second memory;

retrieving, by the processing device, the third processed data from the third memory; and

retrieving, by the processing device, the fourth processed data from the fourth memory.

24. A camera, comprising:

a first memory;

a second memory; and

an image sensor comprising a first plurality of ports connected to the first memory and a second plurality of ports connected to the second memory.

25. The camera of claim 24,

wherein the first memory comprises a synchronous dynamic random access memory;

and

wherein the second memory comprises a synchronous dynamic random access memory.

26. The camera of claim 24,

wherein the first plurality of ports of the image sensor comprise stub series terminated logic output drivers for writing data directly to the first memory;

and

wherein the second plurality of ports of the image sensor comprise stub series terminated logic output drivers for writing data directly to the second memory.

27. The camera of claim 24,

wherein the first memory is located to an opposite side of the image sensor from a side to which the second memory is located.

28. The camera of claim 24, further comprising:

a processing device connected to the first memory and to the second memory and to output interfaces of the camera.

29. The camera of claim 24, further comprising:

a third memory; and

a fourth memory;

wherein the image sensor further comprises a third plurality of ports connected to the third memory and a fourth plurality of ports connected to the fourth memory.

30. The camera of claim 29, further comprising:

a processing device configured to retrieve data from the first memory and the second memory and the third memory and the fourth memory and to provide the retrieved data to output interfaces of the camera.

31. A method in a camera, the method comprising:

providing first data from a first plurality of ports of an image sensor to a first memory; and

providing second data from a second plurality of ports of the image sensor to a second memory.

32. The method of claim 31,

wherein providing the first data comprises providing the first data from the first plurality of ports of the image sensor using stub series terminated logic output drivers directly to the first memory.

33. The method of claim 31, further comprising:

providing third data from a third plurality of ports of the image sensor to a third memory; and

providing fourth data from a fourth plurality of ports of the image sensor to a fourth memory.

34. The method of claim 33, further comprising:

retrieving, by a processing device of the camera, the first data from the first memory;

retrieving, by the processing device, the second data from the second memory;

retrieving, by the processing device, the third data from the third memory; and

retrieving, by the processing device, the fourth data from the fourth memory.