SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES

• US 20150187763A1
• Filed: 09/18/2014
• Published: 07/02/2015
• Est. Priority Date: 12/27/2013
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Jong Ho Lee, Nae-In Lee
• Inventors: Kim, Kug-Hwan, Lee, Jong-Ho, Lee, Nae-In, Kim, Woo-Hee
• Application Number:
  US14/489,900
• Publication Number:
  US 20150187763A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/823821 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 27/0922 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
• CPC Class Codes: H01L 27/0924 including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/42364 characterised by the insulating layer, e.g. thickness or uniformity H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/4958 with a multiple layer structure
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H10B 10/12 comprising a MOSFET load element
• CPC Class Codes: H10B 10/18 Peripheral circuit regions

Abstract

Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided.

Claims

1. A semiconductor device comprising:

a substrate comprising first through fourth areas;

first through fourth gate insulating layers on the first through fourth areas of the substrate, respectively;

first through fourth work function layers on the first through fourth gate insulating layers, respectively; and

first through fourth gate metals on the first through fourth work function layers, respectively,

wherein first and second nitrogen concentrations of the first and second gate insulating layers, respectively, are higher than third and fourth nitrogen concentrations of the third and fourth gate insulating layers, respectively, and

wherein first and second thicknesses of the first and third gate insulating layers, respectively, are thicker than third and fourth thicknesses of the second and fourth gate insulating layers, respectively.

2. The semiconductor device of claim 1, wherein the third and fourth nitrogen concentrations are zero.

3. The semiconductor device of claim 2, wherein the first and second nitrogen concentrations comprise equal nitrogen concentrations.

4. The semiconductor device of claim 3, wherein the first through fourth gate insulating layers each comprise an interface layer and a high-k layer.

5. The semiconductor device of claim 1,

wherein the first and second thicknesses are equal, and

wherein the third and fourth thicknesses are equal.

6. The semiconductor device of claim 1,

wherein the first through fourth gate insulating layers comprise first through fourth amounts, respectively, of a work function control material, and

wherein the first and second amounts are unequal to the third and fourth amounts.

7. The semiconductor device of claim 6, wherein the work function control material comprises lanthanum.

8. The semiconductor device of claim 6, wherein the work function control material comprises aluminum.

9. The semiconductor device of claim 1,

wherein the first through fourth gate insulating layers, the first through fourth work function layers, and the first through fourth gate metals are included in first through fourth transistors, respectively, and

wherein the first through fourth transistors have different first through fourth threshold voltages, respectively.

10. The semiconductor device of claim 9, wherein the second threshold voltage is higher than the third threshold voltage.

11. The semiconductor device of claim 9, wherein the fourth threshold voltage is higher than the first threshold voltage.

12. The semiconductor device of claim 9,

wherein the substrate further comprises fifth through eighth areas,

wherein the semiconductor device further comprises:

fifth through eighth gate insulating layers on the fifth through eighth areas, respectively;

fifth through eighth work function layers on the fifth through eighth gate insulating layers, respectively; and

fifth through eighth gate metals on the fifth through eighth work function layers, respectively,

wherein fifth and sixth nitrogen concentrations of the fifth and sixth gate insulating layers, respectively, are higher than seventh and eighth nitrogen concentrations of the seventh and eighth gate insulating layers, respectively, and

wherein fifth and sixth thicknesses of the fifth and seventh gate insulating layers, respectively, are thicker than seventh and eight thicknesses of the sixth and eighth gate insulating layers, respectively.

13. The semiconductor device of claim 12,

wherein the first through eighth gate insulating layers, the first through eighth work function layers, and the first through eighth gate metals are included in first through eighth transistors, respectively,

wherein the first through eighth transistors have first through eighth threshold voltages, respectively,

wherein the first threshold voltage is higher than the fourth threshold voltage, and

wherein the fifth threshold voltage is lower than the eighth threshold voltage.

14. The semiconductor device of claim 12,

wherein the first through eighth gate insulating layers, the first through eighth work function layers, and the first through eighth gate metals are included in first through eighth transistors, respectively,

wherein the first through eighth transistors have first through eighth threshold voltages, respectively,

wherein the first threshold voltage is higher than the fourth threshold voltage, and

wherein the fifth threshold voltage is higher than the eighth threshold voltage.

15-23. -23. (canceled)

24. A semiconductor device comprising:

a substrate comprising first through fourth areas;

first through fourth gate insulating layers on the first through fourth areas, respectively;

first through fourth work function layers on the first through fourth gate insulating layers, respectively; and

first through fourth gate metals on the first through fourth work function layers, respectively,

wherein the first and second gate insulating layers, but not the third and fourth gate insulating layers, comprise nitrogen, and

wherein the first and third gate insulating materials comprise different first and second amounts of a work function control material, respectively.

25. (canceled)

26. A semiconductor device comprising:

a substrate comprising first through fourth areas thereof, wherein the second area is between the first and third areas, and wherein the third area is between the second and fourth areas; and

first through fourth transistors on the first through fourth areas of the substrate, respectively, the first through fourth transistors comprising first through fourth gate insulating layers, respectively, and the first gate insulating layer comprising a first amount of a work function control material that is different from a second amount of the work function control material that is in one of the second through fourth gate insulating layers.

27. The semiconductor device of claim 26, wherein the first gate insulating layer comprises a first thickness that is different from a second thickness of one of the second through fourth gate insulating layers.

28. The semiconductor device of claim 27,

wherein each of the first through fourth transistors further comprises:

a work function layer on the respective one of the first through fourth gate insulating layers; and

a gate metal on the work function layer, and

wherein the first thickness comprises a thickness of a portion of the first gate insulating layer that extends along a sidewall of the work function layer of the first transistor.

29. The semiconductor device of claim 26, wherein the first gate insulating layer comprises a first nitrogen concentration that is different from a second nitrogen concentration of one of the second through fourth gate insulating layers.

30. The semiconductor device of claim 26, wherein:

the first and third gate insulating layers comprise a first thickness that is thicker than a second thickness of the second and fourth gate insulating layers;

the first and second gate insulating layers comprise a first nitrogen concentration that is higher than a second nitrogen concentration of the third and fourth gate insulating layers;

the first amount of the work function control material is smaller than the second amount of the work function control material;

the third and fourth gate insulating layers comprise the second amount of the work function control material; and

the first and second gate insulating layers comprise the first amount of the work function control material that is smaller than the second amount of the work function control material of the third and fourth gate insulating layers.