Lattice Structure for Capacitance Sensing Electrodes

• US 20150193050A1
• Filed: 12/01/2014
• Published: 07/09/2015
• Est. Priority Date: 01/15/2010
• Status: Active Grant

• Current Assignee: Wistron Corporation
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Chai, Min Chin, Prendergast, Patrick, Peng, Tao
• Granted Patent: US 9,513,755 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G01D 5/24 by varying capacitance
• CPC Class Codes: G01R 1/02 General constructional details
• CPC Class Codes: G06F 2203/04111 Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes
• CPC Class Codes: G06F 3/0445 using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: H03K 17/9622 using a plurality of detectors, e.g. keyboard
• CPC Class Codes: H03K 2217/960775 Emitter-receiver or "fringe" type detection, i.e. one or more field emitting electrodes and corresponding one or more receiving electrodes

Abstract

A sensor array includes a first sensor element of a unit cell and a second sensor element of the unit cell. The unit cell includes core traces of the first sensor element, where the core traces are the widest portion of the first sensor element. The unit cell includes main traces of the second sensor element and subtraces of the second sensor element, where each main trace crosses the first sensor element at a corresponding bridge to form an intersection of the unit cell.

Claims

1-20. -20. (canceled)

21. A sensor array comprising:

a first sensor element of a unit cell; and

a second sensor element of the unit cell, the unit cell comprising;

a plurality of core traces of the first sensor element, wherein each core trace is a widest portion of the first sensor element;

a plurality of main traces of the second sensor element, wherein each main trace crosses the first sensor element at a corresponding bridge to form an intersection of the unit cell; and

a plurality of subtraces of the second sensor element.

22. The sensor array of claim 21, wherein a primary subtrace of the plurality of subtraces is disposed between a first main trace of the plurality of main traces and a second main trace of the plurality of main traces.

23. The sensor array of claim 22, wherein the primary subtrace branches from at least one of the first main trace and the second main trace.

24. The sensor array of claim 23, wherein the primary subtrace is substantially orthogonal to the at least one of the first main trace and the second main trace at a junction between the primary subtrace and the at least one of the first main trace and the second main trace.

25. The sensor array of claim 22, wherein a secondary subtrace of the plurality of subtraces branches from the primary subtrace.

26. The sensor array of claim 25, wherein the secondary subtrace is substantially orthogonal to the primary subtrace at a junction between the secondary subtrace and the primary subtrace.

27. The sensor array of claim 21, wherein the plurality of core traces are disposed on opposite sides of at least one intersection of the unit cell.

28. The sensor array of claim 21, wherein a first primary subtrace of the plurality of subtraces is disposed adjacent to a first core trace of the plurality of core traces and a second primary subtrace of the plurality of subtraces is disposed adjacent to a second core trace of the plurality of core traces.

29. The sensor array of claim 21, wherein the first primary subtrace branches from a first main trace of the plurality of main traces and the second primary subtrace branches from a second main trace of the plurality of main traces.

30. The sensor array of claim 21, wherein a first bridge couples a first portion of a first main trace of the plurality of main traces to a second portion of the first main trace of the plurality of main traces and a second bridge couples a first portion of a second main trace of the plurality of main traces to a second portion of the second main trace of the plurality of main traces.

31. A capacitive sensor array, comprising:

a first plurality of sensor elements, wherein each of the first plurality of sensor elements comprises a core trace, wherein for each sensor element of the first plurality of sensor elements, the core trace of the sensor element wider than any other trace of the sensor element; and

a second sensor element configured to capacitively couple with each of the first plurality of sensor elements, wherein the second sensor element comprises;

a first main trace, a second main trace, and a plurality of primary subtraces branching away from each of the first and second main trace, wherein each of the first main trace and the second main trace intersects each of the first plurality of sensor elements at a bridge to form a plurality of unit cells, wherein each of the plurality of unit cells comprises;

a first intersection between the first main trace and one of the first plurality of sensor elements,

a second intersection between the second main trace and the one of the first plurality of sensor elements,

a first primary subtrace of the plurality of primary subtraces, wherein the first primary subtrace branches from the first main trace, wherein the first primary subtrace is disposed between the first and the second main trace, and

a first secondary subtrace trace that branches from the first primary subtrace.

32. The capacitive sensor array of claim 31, wherein each of the plurality of unit cells comprises a second secondary subtrace that branches from the first primary subtrace.

33. The capacitive sensor array of claim 31, wherein the first secondary subtrace is substantially parallel to at least one of the first main trace and the second main trace.

34. The capacitive sensor array of claim 31, wherein each of the plurality of unit cells comprises a second primary subtrace, wherein the second primary subtrace branches from the first main trace in a second direction that is opposite to a first direction that the first primary subtrace branches from the first main trace.

35. The capacitive sensor array of claim 31, wherein the first primary subtrace branches from the second main trace.

36. The capacitive sensor array of claim 31, wherein each of the plurality of units cells comprise a first portion of the core trace and a second portion of the core trace, which are disposed on opposite sides of at least one intersection of the unit cell.

37. A capacitive touch sensing system, comprising:

a capacitive sensor array comprising a first plurality of sensor elements, which intersect with second plurality of sensor elements to form a plurality of unit cells, each unit cell comprising;

a plurality of core traces of the a first sensor element of the plurality of sensor elements, wherein the core trace is a widest portion of the first sensor element;

a plurality of main traces of a second sensor element of the second plurality of sensor elements, wherein each main trace crosses the first sensor element at a corresponding bridge to form an intersection of the unit cell;

a plurality of subtraces of the second sensor element; and

a capacitance sensor coupled with the capacitive sensor array, wherein the capacitance sensor is configured to determine a mutual capacitance for each unit cell.

38. The capacitive touch sensing system of claim 37, wherein the plurality of core traces are disposed on opposite sides of at least one intersection of the unit cell.

39. The capacitive touch sensing system of claim 37, wherein a primary subtrace of the plurality of subtraces branches from a first main trace of the plurality of main traces and a second main trace of the plurality of main traces as is disposed between the first main trace of the plurality of main traces and the second main trace of the plurality of main traces.

40. The capacitive touch sensing system of claim 39, wherein a secondary subtrace of the plurality of subtraces branches from the primary subtrace and is substantially parallel to at least one of the first main trace and the second main trace.