THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
First Claim
Patent Images
1. A thin film transistor, comprising:
- a gate electrode on a substrate;
a gate insulating layer on the gate electrode;
a semiconductor layer on the gate insulating layer, the semiconductor layer overlapping at least a portion of the gate electrode;
a plurality of etch stoppers on the semiconductor layer, anda source electrode and a drain electrode, which are spaced apart from each other and disposed on the etch stoppers and the semiconductor layer,wherein a plurality of channel regions are defined in the semiconductor layer by the plurality of etch stoppers on the semiconductor layer.
1 Assignment
0 Petitions
Accused Products
Abstract
A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, the semiconductor layer overlapping at least a portion of the gate electrode, a plurality of etch stoppers on the semiconductor layer, and a source electrode and a drain electrode spaced apart from each other and disposed on the etch stoppers and the semiconductor layer, wherein a plurality of channel regions are defined in the semiconductor layer by the etch stoppers on the semiconductor layer.
-
Citations
10 Claims
-
1. A thin film transistor, comprising:
-
a gate electrode on a substrate; a gate insulating layer on the gate electrode; a semiconductor layer on the gate insulating layer, the semiconductor layer overlapping at least a portion of the gate electrode; a plurality of etch stoppers on the semiconductor layer, and a source electrode and a drain electrode, which are spaced apart from each other and disposed on the etch stoppers and the semiconductor layer, wherein a plurality of channel regions are defined in the semiconductor layer by the plurality of etch stoppers on the semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A method of manufacturing a thin film transistor, the method comprising:
-
forming a gate electrode on a substrate; forming a gate insulating layer covering the gate electrode; forming a semiconductor layer overlapping at least a portion of the gate electrode; forming a plurality of etch stoppers on at least a portion of the semiconductor layer; and forming a source electrode and a drain electrode spaced apart from each other and disposed on the semiconductor layer and the etch stoppers. - View Dependent Claims (10)
-
Specification