TRENCH MOSFET HAVING AN INDEPENDENT COUPLED ELEMENT IN A TRENCH

• US 20150194894A1
• Filed: 03/24/2015
• Published: 07/09/2015
• Est. Priority Date: 09/14/2012
• Status: Active Grant

• Current Assignee: Renesas Electronics America Inc.(f/k/a Integrated Device Technology, Inc) (Renesas Electronics Corporation)
• Original Assignee: Renesas Electronics America Inc.(f/k/a Integrated Device Technology, Inc) (Renesas Electronics Corporation)
• Inventors: Sato, Tetsuo, Uno, Tomoaki, Kato, Hirokazu, Matsuura, Nobuyoshi
• Granted Patent: US 9,401,644 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42336 with one gate at least partly formed in a trench
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 1/44 Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/165 by feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 2017/6878 using multi-gate field-effect transistors
• CPC Class Codes: H03K 2217/0036 Means reducing energy consumption
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation

Abstract

A trench MOSFET is disclosed that includes a semiconductor substrate having a vertically oriented trench containing a gate. The trench MOSFET further includes a source, a drain, and a conductive element. The conductive element, like the gate is contained in the trench, and extends between the gate and a bottom of the trench. The conductive element is electrically isolated from the source, the gate, and the drain. When employed in a device such as a DC-DC converter, the trench MOSFET may reduce power losses and electrical and electromagnetic noise.

Claims

1. A method comprising:

a circuit generating complementary high-side and low-side square waves with a dead time between pulses of the high-side and low-side square waves;

a high-side transistor conducting current to an inductor during the pulse of the high-side square wave, wherein the high-side transistor comprises a trench with a gate and a conductive element contained therein, a source, and a drain, wherein the conductive element is isolated from the source, the gate, and the drain by an insulating material;

a low-side transistor conducting current to the inductor during the pulse of the low-side square wave.

2. The method of claim 1 further comprising:

the low-side transistor conducting a forwarding current to the inductor during the dead time between pulses of the high-side and low-side square waves;

the low-side transistor conducting a reverse recovery current at the end of the dead time between pulses of the high-side and low-side square waves;

the high-side transistor conducting some the reverse recovery current via a capacitance between the drain and the conductive element.

3. The method of claim 1 wherein the low-side transistor comprises a trench with a gate and a conductive element contained therein, a source, and a drain, wherein the conductive element of the low-side transistor is separated from the drain of the low-side transistor by an insulating layer thereby creating a capacitance therebetween

4. The method of claim 1 wherein the conductive element of the low-side transistor and the conductive element of the high-side transistor are configured to be connected to a ground node.

5. A method comprising:

a circuit generating complementary high-side and low-side square waves with a dead time between pulses of the high-side and low-side square waves;

a high-side transistor conducting current to an inductor during the pulse of the high-side square wave;

a low-side transistor conducting current to the inductor during the pulse of the low-side square wave, wherein the low-side transistor comprises a trench with a gate and a conductive element contained therein, a source, and a drain, wherein the conductive element is separated from the first source and the first gate by an insulating material.

6. The method of claim 5 further comprising a control circuit controlling voltage on the conductive element as a function of voltage on the gate.

7. The method of claim 5 further comprising a control circuit applying one of a plurality of voltages to the conductive element based on a voltage on the gate.

8. The method claim 5 further comprising a control circuit coupling the conductive element to a first voltage while the low-side transistor is in an active state.

9. The method claim 8 further comprising the control circuit coupling the conductive element to a second voltage while the low-side transistor is in an inactive state, and wherein the first voltage is different than the second voltage.

10. The method claim 9 further comprising the control circuit decoupling the conductive element from the first voltage as the low-side transistor transitions from the active state to the inactive state, and the control circuit coupling the conductive element to the second voltage as the low-side transistor transitions from the active state to the inactive state.

11. The method claim 9 further comprising the control circuit decoupling the conductive element from the second voltage as the low-side transistor transitions from the inactive state to the active state, and the control circuit coupling the conductive element to the first voltage as the low-side transistor transitions from the inactive state to the active state.

12. An apparatus comprising:

a first transistor comprising;

a first trench formed in a first semiconductor substrate;

a first source;

a first drain;

a first gate in the trench;

a first conductive element in the first trench;

wherein the first conductive element extends between the first gate and a bottom of the first trench;

wherein the first conductive element is separated from the first source and the first gate by an insulating material;

a second transistor comprising;

a second trench formed in a second semiconductor substrate;

a second source;

a second drain;

a second gate in the second trench;

a second conductive element in the second trench;

wherein the second conductive element extends between the second gate and a bottom of the second trench, and wherein the second conductive element is separated from the second source and the second gate by an insulating material;

a circuit for generating first and second pulse signals at first and second outputs, respectively;

wherein the first and second outputs of the circuit are electrically coupled to the first and second gates;

an inductor comprising first and second terminals;

wherein the first source and the second drain are electrically coupled together and to the first terminal of the inductor, and;

wherein the first and second conductive elements are electrically coupled together and to a ground node.

13. The apparatus of claim 12 further comprising:

an inductor comprising first and second terminals;

a resistor comprising first and second terminals;

wherein the first source and the second drain are electrically coupled together and to the first terminal of the inductor, and wherein the first and second conductive elements are electrically coupled to the first and second terminals of the resistor, respectively.