MEMORY CONTROLLER, SYSTEM COMPRISING MEMORY CONTROLLER, AND RELATED METHODS OF OPERATION

• US 20150199267A1
• Filed: 07/03/2014
• Published: 07/16/2015
• Est. Priority Date: 01/15/2014
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Chang-Kyu Seol, Eun-Chu Oh, Hong-Rak Son, Jong-Ha Kim, Jun-Jin Kong
• Inventors: OH, EUN-CHU, SEOL, CHANG-KYU, KONG, JUN-JIN, SON, HONG-RAK, KIM, JONG-HA
• Application Number:
  US14/323,294
• Publication Number:
  US 20150199267A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 2212/202 Non-volatile memory
• CPC Class Codes: G06F 2212/403 Error protection encoding, e.g. using parity or ECC codes

Abstract

A method of operating a memory controller comprises receiving original data from an external source, partitioning the original data into multiple elements of unit data, changing an order of at least one element of unit data to reduce the number of occurrences of a target state among the multiple units of unit data, and controlling a non-volatile memory device to program the multiple elements of unit data having the reduced number of occurrences of the target state.

Claims

1. A method of operating a memory controller, comprising:

receiving original data from an external source;

partitioning the original data into multiple elements of unit data;

changing an order of at least one element of unit data to reduce the number of occurrences of a target state among the multiple units of unit data; and

controlling a non-volatile memory device to program the multiple elements of unit data having the reduced number of occurrences of the target state.

2. The method of claim 1, wherein the original data is error correction code (ECC) encoded data.

3. The method of claim 1, wherein the original data is randomized data.

4. The method of claim 1, wherein the unit data sector unit data that is an error correction code (ECC) operation unit.

5. The method of claim 1, wherein the unit data is page unit data for a program or read operation.

6. The method of claim 1, the method wherein the unit data is randomizing operation unit data.

7. The method of claim 1, wherein the target state is a uppermost programmed state.

8. The method of claim 1, further comprising:

performing a state shaping operation on the multiple elements of unit data after changing the order of the at least one element of unit data.

9. The method of claim 1, further comprising:

performing a state shaping operation after changing an order of unit data.

10. The method of claim 1, wherein changing the order of at least one unit data is performed based on the number of target states.

11. The method of claim 1, wherein changing the order of at least one unit data is performed based on the number of occurrences of a bit value among the multiple elements of unit data.

12. A method of operating a memory controller that controls a multi-level cell (MLC) non-volatile memory device, the method comprising:

receiving original data from an external source;

partitioning the original data into multiple units of page data;

selecting the units of page data and combining the selected units to reduce a number of target data patterns among the units of page data; and

controlling the non-volatile memory device to program the combined units of page data.

13. The method of claim 12, wherein when the MLC non-volatile memory device is a 4-bit MLC non-volatile memory device, and 4 units of page data are selected and combined.

14. The method of claim 12, wherein the original data comprises at least four types of page data.

15. The method of claim 12, further comprising performing a state shaping operation on the units of page data before selecting the units of page data.

16. The method of claim 12, wherein a non-volatile memory device comprises a memory cell array stacked on substrate and comprising multiple blocks.

17. The method of claim 12, further comprising performing a page mapping operation using combined page data.

18. A method of operating a memory controller that controls a three dimensional non-volatile memory device, comprising:

partitioning original data from a host into multiple units of page data;

rearranging an order of the page data to reduce the number of occurrences of a target data pattern; and

providing the non-volatile memory device with the rearranged page data.

19. The method of claim 18, wherein the rearranging of the order of the page data is based on a first and a second page data pattern.

20. The method of claim 18, further comprising performing a state shaping operation using rearranged page unit data.

21-30. -30. (canceled)