Self-Aligned Double Patterning With Spatial Atomic Layer Deposition

• US 20150200110A1
• Filed: 01/13/2015
• Published: 07/16/2015
• Est. Priority Date: 01/13/2014
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Li, Ning, Nguyen, Victor, Balseanu, Mihaela, Xia, Li-Qun, Marcus, Steven D., Tanaka, Keiichi
• Granted Patent: US 11,164,753 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: C23C 16/45551 for relative movement of the substrate and the gas injectors or half-reaction reactor compartments
• CPC Class Codes: H01J 37/32357 Generation remote from the workpiece, e.g. down-stream
• CPC Class Codes: H01J 37/3244 Gas supply means
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/68764 characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
• CPC Class Codes: H01L 21/68771 characterised by supporting more than one semiconductor substrate

Abstract

Provided are self-aligned double patterning methods including feature trimming. The SADP process is performed in a single batch processing chamber in which the substrate is laterally moved between sections of the processing chamber separated by gas curtains so that each section independently has a process condition.

Claims

1. A processing method comprising:

providing a substrate with a first layer and a patterned layer thereon, portions of the first layer exposed through the patterned layer, the patterned layer comprising at least one feature having a top surface and two vertical faces defining a width, the vertical faces substantially perpendicular to the first layer;

trimming the patterned layer to reduce the width of the patterned layer;

depositing a spacer layer over the first layer and patterned layer so that the spacer layer forms a film on the portions of the first layer exposed through the patterned layer, the top surface and both vertical faces of the at least one feature; and

etching the spacer layer from the top surface of the at least one feature and the portions of the first layer exposed through the patterned layer.

2. The processing method of claim 1, wherein the patterned layer comprises one or more of a photoresist or spin-on-carbon.

3. The processing method of claim 1, wherein the patterned layer has a width in the range of about 200 Å

to about 800 Å

.

4. The processing method of claim 1, wherein the patterned layer comprises a dielectric.

5. The processing method of claim 1, wherein the patterned layer has an aspect ratio in the range of about 1:

1 to about 20;

1.

6. The processing method of claim 1, wherein trimming the patterned layer comprises exposing the patterned layer to a plasma.

7. The processing method of claim 6, wherein the patterned layer comprises spin-on-carbon and the plasma comprises argon and carbon dioxide.

8. The processing method of claim 6, wherein trimming the patterned layer reduced the width by an amount in the range of about 10 Å

to about 200 Å

.

9. The processing method of claim 6, wherein after trimming the patterned layer, the vertical faces are substantially perpendicular to the first layer.

10. The processing method of claim 1, wherein the spacer layer comprises one or more of an oxide, a nitride or a carbonitride.

11. The processing method of claim 1, wherein each of the trimming, depositing and etching occurs in a single processing chamber in which the substrate is moved laterally between a plurality of sections, each section separated from adjacent sections by a gas curtain.

12. The processing method of claim 11, wherein trimming the patterned layer occurs in a first section of the processing chamber, depositing the spacer layer occurs in a second section of the processing chamber and etching the spacer layer occurs in a third section of the processing chamber.

13. The method of claim 12, further comprising removing the patterned layer followed by etching the spacer and exposed first layer .

14. A processing method comprising:

placing a substrate having a first layer and a patterned layer thereon into a processing chamber comprising a plurality of sections, each section separated from adjacent sections by a gas curtain, portions of the first layer exposed through the patterned layer, the patterned layer comprising at least one feature having a top surface and two vertical faces defining a width, the vertical faces substantially perpendicular to the first layer;

exposing at least a portion of the substrate to a first process condition to trim the patterned layer to reduce the width of the patterned layer;

laterally moving the substrate through a gas curtain to a second section of the processing chamber;

exposing the substrate to a second process condition to deposit a spacer layer over the first layer and the patterned layer so that the spacer layer forms a film on the portions of the first layer exposed through the patterned layer, the top surface and both vertical faces of the at least one feature;

laterally moving the substrate through a gas curtain to a third section of the processing chamber; and

exposing the substrate to a third process condition to etch the spacer layer from the top surface of the at least one feature and the portions of the first layer exposed through the patterned layer,

wherein during lateral movement of the substrate, a first portion of the substrate is exposed to the first process condition at the same time that a second portion of the surface is exposed to the second process conditions and an intermediate portion of the substrate is exposed to the gas curtain.

15. The processing method of claim 14, wherein the patterned layer has a width in the range of about 200 Å

to about 800 Å

.

16. The processing method of claim 14, wherein the first process conditions to trim the patterned layer comprises exposing the patterned layer to a plasma.

17. The processing method of claim 16, wherein trimming the patterned layer reduced the width by an amount in the range of about 10 Å

to about 200 Å

.

18. The processing method of claim 14, wherein the spacer layer comprises one or more of an oxide, a nitride or a carbonitride.

19. The method of claim 14, further comprising removing the patterned layer followed by etching the spacer and exposed first layer.

20. A processing method comprising:

providing a substrate with a first layer comprising a dielectric and a patterned layer thereon, portions of the first layer exposed through the patterned layer, the patterned layer comprising at least one feature having a top surface and a two vertical faces defining a width in the range of about 200 Å

to about 800 Å

, the vertical faces substantially perpendicular to the first layer;

exposing the patterned layer to a plasma to reduce the width of the patterned layer by an amount greater than about 10 Å

so that the trimmed vertical faces are substantially perpendicular to the first layer;

depositing a spacer layer comprising one or more of an oxide, a nitride, an oxynitride or a carbonitride over the first layer and patterned layer so that the spacer layer forms a film on the portions of the first layer exposed through the patterned layer, the top surface and both vertical faces of the at least one feature; and

etching the spacer layer from the top surface of the at least one feature and the portions of the first layer exposed through the patterned layer.