METHOD OF MANUFACTURING THIN-FILM TRANSISTOR SUBSTRATE

• US 20150200113A1
• Filed: 12/23/2014
• Published: 07/16/2015
• Est. Priority Date: 01/10/2014
• Status: Active Grant

• Current Assignee: JDI Design and Development GK
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: KISHIDA, Yuji, YOSHITANI, Toshiaki
• Granted Patent: US 9,741,588 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78636 with supplementary region or layer for improving the flatness of the device
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

A method of manufacturing a thin-film transistor substrate which includes a thin-film transistor includes: forming a planarization layer comprising polyimide material above the thin-film transistor; and heating the thin-film transistor at a temperature of 240° C. or lower after the planarization layer is formed.

Claims

1. A method of manufacturing a thin-film transistor substrate which includes a thin-film transistor, the method comprising:

forming a planarization layer comprising polyimide material above the thin-film transistor; and

heating the thin-film transistor at a temperature of 240°

C. or lower after the planarization layer is formed.

2. The method of manufacturing a thin-film transistor substrate according to claim 1,

wherein, in the heating, the heating is performed at a temperature of 200°

C. or higher.

3. The method of manufacturing a thin-film transistor substrate according to claim 1,

wherein, in the forming of a planarization layer, the polyimide material is deposited and heated at a temperature of 250°

C. or higher to form the planarization layer.

4. The method of manufacturing a thin-film transistor substrate according to claim 1, further comprising

forming a pixel electrode on the planarization layer after the heating.

5. The method of manufacturing a thin-film transistor substrate according to claim 1, further comprising

forming, above a source electrode and a drain electrode of the thin-film transistor, a line layer connected to one of the source electrode and the drain electrode,

wherein in the forming of a planarization layer, the planarization layer is formed above the line layer.

6. The method of manufacturing a thin-film transistor substrate according to claim 1,

wherein the thin-film transistor comprises a semiconductor layer that is an oxide semiconductor.

7. The method of manufacturing a thin-film transistor substrate according to claim 6,

wherein the oxide semiconductor is a transparent amorphous oxide semiconductor.