METHOD AND APPARATUS FOR MODIFIED CELL ARCHITECTURE AND THE RESULTING DEVICE
First Claim
Patent Images
1. A method comprising:
- determining a first vertical track spacing for a plurality of first routes for an integrated circuit (IC) design, each of the plurality of first routes having a first width;
determining a second vertical track spacing for a second route for the IC design, the second route having a second width; and
designating a cell vertical dimension for the IC design based on the first and second vertical track spacings.
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Abstract
A methodology for a modified cell architecture and the resulting devices are disclosed. Embodiments may include determining a first vertical track spacing for a plurality of first routes for an integrated circuit (IC) design, each of the plurality of first routes having a first width, determining a second vertical track spacing for a second route for the IC design, the second route having a second width, and designating a cell vertical dimension for the IC design based on the first and second vertical track spacings.
13 Citations
20 Claims
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1. A method comprising:
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determining a first vertical track spacing for a plurality of first routes for an integrated circuit (IC) design, each of the plurality of first routes having a first width; determining a second vertical track spacing for a second route for the IC design, the second route having a second width; and designating a cell vertical dimension for the IC design based on the first and second vertical track spacings. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An apparatus comprising:
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at least one processor; and at least one memory including computer program code for one or more programs, the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus to perform at least the following, determine a first vertical track spacing for a plurality of first routes for an integrated circuit (IC) design, each of the plurality of first routes having a first width; determine a second vertical track spacing for a second route for the IC design, the second route having a second width; and designate a cell vertical dimension for the IC design based on the first and second vertical track spacings. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A method comprising:
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determining a first vertical track spacing for a plurality of first routes for an integrated circuit (IC) design, each of the plurality of first routes having a first width; determining a second vertical track spacing for a second route for the IC design, the second route having a second width; designating a cell vertical dimension for the IC design based on the first and second vertical track spacings; initiating a placement of the plurality of first routes extending horizontally in the cell and each being placed on one of a plurality of equally spaced vertical track positions of the cell with the first vertical track spacing; initiating a placement of the second route extending horizontally in the cell and being placed on a top or bottom vertical track position of the cell; determining the first width based on a minimum metal width of a double patterning process; determining the second width based on an electro-migration (EM) and IR-drop effect; and designating the second route as a power or ground rail for the IC design. - View Dependent Claims (20)
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Specification