TRENCH FIELD-EFFECT DEVICE AND METHOD OF FABRICATING SAME

• US 20150214061A1
• Filed: 07/18/2012
• Published: 07/30/2015
• Est. Priority Date: 02/10/2012
• Status: Active Grant

• Current Assignee: CSMC Technologies FAB1 Company Limited (CSMC Manufacturing Company Limited)
• Original Assignee: CSMC Technologies FAB1 Company Limited (CSMC Manufacturing Company Limited)
• Inventors: Zhou, Hongwei, Gao, Dongyue
• Granted Patent: US 9,601,336 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/28229 by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

The present invention provides a method of fabricating a trench field-effect device. The method includes: providing a substrate including an epitaxial layer formed on a semiconductor substrate of the substrate and a trench formed in the epitaxial layer; forming a sacrificial dielectric layer on a bottom and a sidewall of the trench; forming a heavily-doped polysilicon region at the bottom, and removing part of the sacrificial dielectric layer not covered by the heavily-doped polysilicon region to expose an epitaxial layer of the sidewall; and oxidizing the heavily-doped polysilicon region and the epitaxial layer simultaneously and forming a thick oxide layer and a trench sidewall gate dielectric layer synchronously on the bottom and the sidewall, respectively; wherein thickness of the thick oxide layer is greater than that of the trench sidewall gate dielectric layer. The method is simple, and figure of merit of the fabricated trench field-effect device is reduced.

Claims

1. A method of fabricating a trench field-effect device, comprising:

providing a substrate, the substrate comprising an epitaxial layer formed on a semiconductor substrate of the substrate and a trench formed in the epitaxial layer;

forming a sacrificial dielectric layer on a bottom and a sidewall of the trench;

forming a heavily-doped polysilicon region at the bottom of the trench, and removing part of the sacrificial dielectric layer that is not covered by the heavily-doped polysilicon region to expose an epitaxial layer of the sidewall of the trench; and

oxidizing the heavily-doped polysilicon region and the epitaxial layer of the sidewall of the trench simultaneously, and forming a thick oxide layer and a trench sidewall gate dielectric layer synchronously on the bottom and the sidewall of the trench, respectively;

wherein the thickness of the thick oxide layer is greater than that of the trench sidewall gate dielectric layer formed synchronously with the thick oxide layer, and the thick oxide layer is used as a trench bottom gate dielectric layer of the trench field-effect device.

2. The method of claim 1, wherein the epitaxial layer is relatively-lightly-doped monocrystalline silicon.

3. The method of claim 2, wherein the semiconductor substrate is a monocrystalline silicon substrate, the doping concentration of the epitaxial layer is smaller than that of the semiconductor substrate.

4. The method of claim 2, wherein the doping concentration of the heavily-doped polysilicon region is over 20 times greater than that of the epitaxial layer.

5. The method of claim 1, wherein the doping concentration of the epitaxial layer is less than or equal to 5E17 cm⁻

3.

6. The method of claim 1, wherein the doping concentration of the heavily-doped polysilicon region is greater than or equal to 1E19 cm⁻

3.

7. The method of claim 1, wherein a growth speed of the thick oxide layer is greater than that of the trench sidewall gate dielectric layer during oxidization.

8. The method of claim 1, wherein the oxidization uses a thermal oxidation process with high-pressure-and-wet-oxygen conditions.

9. The method of claim 8, wherein a pressure of the thermal oxidation process is greater than one standard atmospheric pressure.

10. The method of claim 1, wherein the thickness of the heavily-doped polysilicon region is in a range from 400 Å

to 5000 Å

.

11. The method of claim 1, wherein the thickness of the thick oxide layer is 2 to 4 times greater than that of the trench sidewall gate dielectric layer.

12. The method of claim 11, wherein the thickness of the thick oxide layer is greater than or equal to 400 Å

and less than or equal to 6000 Å

.

13. The method of claim 1, wherein a doping type of the heavily-doped polysilicon region is N-type.

14. The method of claim 1, wherein the thickness of the sacrificial dielectric layer is in a range from 400 Å

to 2000 Å

.

15. The method of claim 14, wherein the thick oxide layer is formed on a sacrificial dielectric layer of the bottom of the trench, part of the sacrificial dielectric layer covered by the heavily-doped polysilicon region and the thick oxide layer cooperatively form a trench bottom gate dielectric layer in a gate dielectric layer of the trench field-effect device.

16. A trench field-effect device fabricated by using the method of claim 1.