COUNTERFEIT MICROELECTRONICS DETECTION BASED ON CAPACITIVE AND INDUCTIVE SIGNATURES

• US 20150219714A1
• Filed: 02/05/2015
• Published: 08/06/2015
• Est. Priority Date: 02/05/2014
• Status: Active Grant

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Hamilton, Brett J., Howard, Andrew M.
• Granted Patent: US 9,959,430 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G01R 31/26 Testing of individual semiconductor devices testing or measuring during manufacture or treatment H01L22/00; testing of photovoltaic devices H02S50/10
• CPC Class Codes: G01R 31/2837 Characterising or performance testing, e.g. of frequency response transient response G01R27/28
• CPC Class Codes: G01R 31/2839 using signal generators, power supplies or circuit analysers G01R31/2879 takes precedence; multimeters G01R15/12, network analysers G01R27/28
• CPC Class Codes: G01R 31/2851 Testing of integrated circuits [IC] G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801
• CPC Class Codes: G06F 21/73 by creating or determining hardware identification, e.g. serial numbers

Abstract

Systems and methods for detecting counterfeit integrated circuits are provided. One exemplary embodiment of a method can include: providing an integrated circuit for testing; and characterizing capacitive and inductive loading of the integrated circuit power for a specified frequency range; wherein the characterizing step further comprises applying a low level alternating current to a power pin while measuring for capacitance characterization conditions created by the integrated circuit'"'"'s internal capacitance and inductance responses, wherein by sweeping the alternating current signal across a specified frequency range one or more capacitance related device signature can be created and used to identify a component as originating from a trusted source or not. A system can include components and machine readable instructions for operating the components using exemplary methods. Exemplary embodiments can include automated systems that can also be used with the device signature on a production line or in a supply chain verification location.

Claims

1. A system for detecting counterfeit or mischaracterized integrated circuits comprising:

a first section comprising a control section and capacitance analyzer section comprising both inputs and outputs operable or configured to supply an electrical signal, said capacitance analyzer is further configured to measure a first and second plurality of capacitance data comprising a plurality of capacitance measurements at a plurality of different frequencies within a first frequency range, wherein said first section is operable or configured to generate a capacitance curve plot data based on said first plurality of capacitance data at respective different frequencies within said frequency range;

a fixture adapted to couple to said analyzer and a first and second device under test respectively comprising a first and second integrated circuit each associated with a predetermined category of integrated circuit, wherein said first integrated circuit comprises a power pin or interface, wherein said fixture couples said power pin or interface with said capacitance analyzer, said first section is configured to separately apply said electrical signal to respective said power pins of both first and second integrated circuits in a first and second testing operation to separately generate said first and second plurality of capacitance measurements;

wherein said first section is configured to determine a capacitance device signature (CDS) data comprising one or more said first plurality of capacitance data and a related frequency setting data respectively associated with said one or more said first plurality of capacitance data, said CDS data are selected, determined and stored based on detection of resonance transitions within said first plurality of capacitance measurements or determination of two or more said first plurality of capacitance measurements associated with said capacitance curve plot slope that is closest to a zero slope value;

wherein said first section is further configured to compare said CDS data with said second plurality of capacitance data and determine a match or no-match data between said CDS data and said second plurality of capacitance data;

wherein said first section further comprises an input and output section configured to output said determined match or no-match data associated with said second device under test in a display, a data output, or another recording medium output.

2. A system for detecting counterfeit integrated circuits as set forth in claim 1, wherein said output section display comprises a digital read-out.

3. A system for detecting counterfeit integrated circuits as set forth in claim 1, wherein said fixture removably receives said first and second device under test.

4. A method for detecting counterfeit integrated circuits comprising:

providing a first integrated circuit comprising a power pin for testing;

characterizing capacitive and inductive loading of the first integrated circuit power pin for a specified frequency range, wherein said characterizing step further comprises applying said a low level alternating current to the power pin and sweeping or incrementally adjusting the alternating current signal across said specified frequency range;

measuring a first plurality of capacitance data using a capacitance analyzer section, each one of said first plurality of capacitance data comprises a capacitance data and a frequency value associated with said low level alternating current at which each said capacitance data was measured at;

determining if one or more of said first plurality of capacitance data shows a first or second capacitance characterization, wherein said first capacitance characterization comprises a change from negative to positive capacitance created by the integrated circuit'"'"'s internal capacitance and inductance at different frequencies in said specified frequency range, said second characterization is associated with one or more segments of a capacitance curve plot of one or more said first plurality of capacitance data having a slope closest to zero as compared to other segments of said capacitance curve plot;

creating one or more device signature data comprising respective capacitance data associated with said one or more of said first plurality of capacitance data having said first or second capacitance characterizations;

applying at least one or more second electrical signals at a respective one or more second frequencies to at least one power pin of a second device under test that are of a same type as the first integrated circuit;

applying said low level alternating current on said power pin of said second device under test at one or more a frequencies associated with said one or more said device signature data;

measuring one or more second capacitance data from said at least one power pin of said second device under test at said one or more frequencies, wherein said one or more second capacitance data comprises a capacitance measurement at said one or more frequencies associated with said one or more device signature data;

comparing said one or more device signature data with respective said one or more second capacitance data to determine a match or no match between respective said device signature data and said one or more second capacitance data to identify if said one or more second integrated circuits originating from a foundry that produced the first integrated circuit; and

outputting comparison data comprising an indicator associated with determining if said one or more second integrated circuits originated from said foundry that produced the first integrated circuit.

5. A method for detecting counterfeit integrated circuits as set forth in claim 4, wherein said outputting step comprising displaying said indicator on a display comprising a digital read-out.

6. A method for detecting counterfeit or mischaracterized integrated circuits as set forth in claim 4, wherein said integrated circuit is tested in a fixture that removably receives said first and second devices under test.

7. A method for detecting an undesirable condition of an integrated circuit comprising:

providing a testing system including a capacitance measuring system and coupling the system to a first integrated circuit comprising at least one power pin for testing;

commencing taking a plurality of capacitance measurements associated with characterizing capacitive and inductive loading of the first integrated circuit power pin where each said measurement is associated with a different frequency within a specified frequency range comprising a first characterization step and a second characterization step, wherein said first characterization step comprises applying an alternating current signal with a first voltage to the first integrated circuit power pin, wherein said second characterization step comprises sweeping or incrementally modulating or adjusting the alternating current signal across the specified frequency range and taking each of said plurality of capacitance measurements at a plurality of test points in said specified frequency range;

generating a plurality of first capacitance curve plot data based on said plurality of capacitance measurements and identifying one or more candidate device signature data from said first capacitance curve plot data comprising at least one of said plurality of capacitance measurements selected associated with at least one resonance transition in said plurality of first capacitance curve plot data or a lack of said resonance transition in said plurality of capacitance curve plot data, wherein said candidate device signature data based on said lack of said resonance transition is determined based on selection of one of said plurality of capacitance measurements within a first segment of said first capacitance curve plot that has a slope value between any at least two data points within said capacitance curve plot data that is closest to a zero slope value, said candidate device signature data comprises capacitance measurement and a respective one of said different frequencies at which said capacitance measurement was taken at;

selecting one or more device signature data from at least one said candidate device signature data and recording one of said plurality of capacitance measurement data associated with said selected candidate device signature data and frequency at which said capacitance measurement was taken for each selected device signature data; and

providing a second integrated circuit having a second power pin and internal electrical circuit manufactured to be a copy of the first integrated circuit, measuring capacitance of said second power pin at said alternating current signal, modulating said alternating current signal based on each said one or more said selected device signature frequencies, and measuring capacitance values at each said one or more said selected device signature frequencies to produce one or more capacitance comparison data associated with each selected device signature, comparing said one or more capacitance comparison data with a respective said selected device signature data, and determining a match or no match between respective said device signature data and said respective capacitance comparison data to determines if said second integrated circuit is an acceptable or unacceptable part.

8. A method as in claim 7, further comprising outputting said determination of if said second integrated circuit is an acceptable or unacceptable part on a recording or display medium.

9. A method as in claim 8, wherein said outputting step comprises displaying an indicator of said determination if said second integrated circuit is an acceptable or unacceptable part on a display comprising a digital read-out.

10. A method for detecting counterfeit or mischaracterized integrated circuits as set forth in claim 7, wherein said first and second integrated circuits are tested in a fixture that removably receives said first and second integrated circuits.

12. A method as in claim 8 further comprising:

providing a second integrated circuit having a second power pin and internal electrical circuit manufactured to be a copy of the first integrated circuit;

measuring capacitance of said second power pin at said alternating current signal;

modulating said alternating current signal based on each said one or more said selected device signature frequencies and measuring capacitance values at each said one or more said selected device signature frequencies to produce one or more capacitance comparison data associated with each selected device signature;

comparing said one or more capacitance comparison data with a respective said selected device signature data;

determining a match or no match between respective said device signature data and said respective capacitance comparison data;

determining if said second integrated circuit is an acceptable or unacceptable part based on said determined match or no match.

11. A method for detecting an undesirable condition of an integrated circuit comprising:

providing a testing system including a capacitance measuring system and coupling the system to a first integrated circuit comprising at least one power pin for testing;

commencing taking a plurality of capacitance measurements associated with characterizing capacitive and inductive loading of the first integrated circuit power pin where each said measurement is associated with a different frequency within a specified frequency range comprising a first characterization step and a second characterization step, wherein said first characterization step comprises applying an alternating current signal with a first voltage to the first integrated circuit power pin, wherein said second characterization step comprises sweeping or incrementally modulating or adjusting the alternating current signal across the specified frequency range and taking each of said plurality of capacitance measurements at a plurality of test points in said specified frequency range;

generating a plurality of first capacitance curve plot data based on said plurality of capacitance measurements and identifying one or more candidate device signature data from said first capacitance curve plot data comprising at least one of said plurality of capacitance measurements selected associated with at least one resonance transition in said plurality of first capacitance curve plot data or a lack of said resonance transition in said plurality of capacitance curve plot data, wherein said candidate device signature data based on said lack of said resonance transition is determined based on selection of one of said plurality of capacitance measurements within a first segment of said first capacitance curve plot that has a slope value between any at least two data points within said capacitance curve plot data that is closest to a zero slope value, said candidate device signature data comprises capacitance measurement and a respective one of said different frequencies at which said capacitance measurement was taken at; and

selecting one or more device signature data from at least one said candidate device signature data and recording one of said plurality of capacitance measurement data associated with said selected candidate device signature data and frequency at which said capacitance measurement was taken for each selected device signature data.