INSTRUCTION AND METHOD FOR FUSED RAKE-FINGER OPERATION ON A VECTOR PROCESSOR

• US 20150222453A1
• Filed: 01/31/2014
• Published: 08/06/2015
• Est. Priority Date: 01/31/2014
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Khan, Raheel, Singaravelu, Gayatri, Hsu, Steve Hengchen
• Granted Patent: US 9,276,778 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 9/30 Arrangements for executing machine instructions, e.g. instruction decode for executing microinstructions G06F9/22
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
• CPC Class Codes: H04B 1/7115 Constructive combining of multi-path signals, i.e. RAKE receivers
• CPC Class Codes: H04B 1/7117 Selection, re-selection, allocation or re-allocation of paths to fingers, e.g. timing offset control of allocated fingers
• CPC Class Codes: H04L 25/0204 of multiple channels
• CPC Class Codes: H04L 25/0212 of impulse response
• CPC Class Codes: H04L 25/0224 using sounding signals

Abstract

Systems and methods for performing a rake-finger operation on a vector processor are described herein. In one embodiment, a method for rake-finger processing comprises loading samples from a register into an execution unit, performing a rake-finger operation on the samples in the execution unit, and writing results from the rake-finger operation to the register. Performing the rake-finger operation comprises performing a finite impulse response (FIR) filter operation, and performing a despread operation, wherein filtered samples from the FIR filter operation are input to the despread operation without going through the register.

Claims

1. A method for rake-finger processing, comprising:

loading samples from a register into an execution unit;

performing a rake-finger operation on the samples in the execution unit, wherein performing the rake-finger operation comprises;

performing a finite impulse response (FIR) filter operation; and

performing a despread operation, wherein filtered samples from the FIR filter operation are input to the despread operation without going through the register; and

writing results from the rake-finger operation to the register.

2. The method of claim 1, wherein performing the rake-finger operation further comprises performing a rotation operation, and wherein rotated samples from the rotation operation are input to the FIR filter operation without going through the register.

3. The method of claim 2, wherein the rotation operation compensates for the carrier frequency offset in the samples.

4. The method of claim 3, wherein performing the rotation operation comprises:

generating phases, and

rotating the samples by the generated phases to compensate for the carrier frequency offset.

5. The method of claim 1, wherein performing the despread operation comprises:

despreading the filtered samples with a code into despreaded samples; and

accumulating the despreaded samples over a length of the code to generate a symbol.

6. The method of claim 5, wherein the code comprises a pilot code.

7. The method of claim 1, wherein performing the despread operation comprises:

despreading the filtered samples with a code into first despreaded samples;

accumulating the first despreaded samples over a length of the code to generate a first symbol;

despreading the filtered samples with a time-shifted version of the code into second despreaded samples; and

accumulating the second despreaded samples over a length of the time-shifted version of the code to generate a second symbol.

8. The method of claim 7, wherein the first and second symbols are spaced a half a chip apart or one chip apart.

9. The method of claim 7, further comprising delaying the code by one chip to generate the time-shifted version of the code.

10. The method of claim 1, further comprising configuring the execution unit to perform the rake-finger operation using a single instruction.

11. An apparatus for rake-finger processing, comprising:

means for loading samples from a register into an execution unit;

means for performing a rake-finger operation on the samples in the execution unit, wherein the means for performing the rake-finger operation comprises;

means for performing a finite impulse response (FIR) filter operation; and

means for performing a despread operation, wherein filtered samples from the means for performing the FIR filter operation are input to the means for performing the despread operation without going through the register; and

means for writing results from the rake-finger operation to the register.

12. The apparatus of claim 11, wherein the means for performing the rake-finger operation further comprises means for performing a rotation operation, and wherein rotated samples from the means for performing the rotation operation are input to the means for performing the FIR filter operation without going through the register.

13. The apparatus of claim 12, wherein the rotation operation compensates for the carrier frequency offset in the samples.

14. The apparatus of claim 13, wherein the means for performing the rotation operation comprises:

means for generating phases, and

means for rotating the samples by the generated phases to compensate for the carrier frequency offset.

15. The apparatus of claim 11, wherein the means for performing the despread operation comprises:

means for despreading the filtered samples with a code into despreaded samples; and

means for accumulating the despreaded samples over a length of the code to generate a symbol.

16. The apparatus of claim 15, wherein the code comprises a pilot code.

17. The apparatus of claim 11, wherein the means for performing the despread operation comprises:

means for despreading the filtered samples with a code into first despreaded samples;

means for accumulating the first despreaded samples over a length of the code to generate a first symbol;

means for despreading the filtered samples with a time-shifted version of the code into second despreaded samples; and

means for accumulating the second despreaded samples over a length of the time-shifted version of the code to generate a second symbol.

18. The apparatus of claim 17, wherein the first and second symbols are spaced a half a chip apart or one chip apart.

19. The apparatus of claim 17, further comprising means for delaying the code by one chip to generate the time-shifted version of the code.

20. An execution unit, comprising:

a read circuit configured to load samples from a register into the execution unit;

a rake-finger circuit configured to perform a rake-finger operation on the samples in the execution unit, wherein the rake-finger circuit comprises;

a finite impulse response (FIR) filter circuit configured to perform an FIR filter operation; and

a despread circuit configured to perform a despread operation, wherein filtered samples from the FIR filter circuit are input to the despread circuit without going through the register; and

a write circuit configured to write results from the rake-finger circuit to the register.

21. The execution unit of claim 20, wherein the rake-finger circuit further comprises a rotator configured to perform a rotation operation, and wherein rotated samples from the rotator are input to the FIR filter circuit without going through the register.

22. The execution unit of claim 21, wherein the rotation operation compensates for the carrier frequency offset in the samples.

23. The execution unit of claim 20, wherein the despread circuit comprises:

a multiplier configured to despread the filtered samples with a code into despreaded samples; and

an accumulator configured to accumulate the despreaded samples over a length of the code to generate a symbol.

24. The execution unit of claim 23, wherein the code comprises a pilot code.

25. The execution unit of claim 20, wherein the despread circuit comprises:

a first multiplier configured to despread the filtered samples with a code into first despreaded samples;

a first accumulator configured to accumulate the first despreaded samples over a length of the code to generate a first symbol;

a second multiplier configured to despread the filtered samples with a time-shifted version of the code into second despreaded samples; and

a second accumulator configured to accumulate the second despreaded samples over a length of the time-shifted version of the code to generate a second symbol.

26. The execution unit of claim 25, wherein the first and second symbols are spaced a half a chip apart or one chip apart.