APPARATUS AND METHOD FOR STABILIZING OUTPUT SEQUENCE OF REAL RANDOM NUMBER GENERATOR

• US 20150227344A1
• Filed: 02/05/2015
• Published: 08/13/2015
• Est. Priority Date: 02/12/2014
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: PARK, Sun-Chun, RYU, Hyung-Yul, CHO, Young-Jun
• Granted Patent: US 9,841,949 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 7/58 Random or pseudo-random number generators
• CPC Class Codes: G06F 7/588 Random number generators, i.e. based on natural stochastic processes
• CPC Class Codes: G06N 7/02 using fuzzy logic computing arrangements based on biological models G06N3/00; computing arrangements using knowledge-based models G06N5/00

Abstract

An apparatus and method that stabilizes an output sequence of a real random number generator by adjusting the input voltage of the random number generator or the comparative voltage of a comparator. The apparatus for stabilizing an output sequence of a real random number generator includes a verification unit for performing a monobit test on random number values sampled by and output from a comparison unit, and calculating an impact value. An adjustment unit adjusts a voltage of any one of a random number generation unit and the comparison unit using resulting values of the monobit test and the impact value output from the verification unit.

Claims

1. An apparatus for stabilizing an output sequence of a real random number generator, comprising:

a verification unit for performing a monobit test on random number values sampled by and output from a comparison unit, and calculating an impact value, and

an adjustment unit for adjusting a voltage of any one of a random number generation unit and the comparison unit using resulting values of the monobit test and the impact value output from the verification unit.

2. The apparatus of claim 1, wherein the verification unit performs the monobit test using the following monobit test equation:

X=(n₀−

n₁)²/n

where X denotes calculation results of the monobit test, n₀ denotes a number of 0'"'"'s, denotes a number of 1'"'"'s, and n denotes a total number of bits.

3. The apparatus of claim 2, wherein the impact value becomes a negative (−

) value when (n₀−

n₁) is greater than 0 in the monobit test equation, whereas the impact value becomes a positive (+) value when (n₀−

n₁) is less than 0.

4. The apparatus of claim 1, wherein the adjustment unit comprises:

a fuzzy function unit for fuzzifying the resulting values of the monobit test from the verification unit using a preset fuzzy function;

a fuzzy engine unit for performing fuzzy inference by applying fuzzy values from the fuzzy function unit to a fuzzy rule; and

a defuzzy function unit for converting the fuzzy values indicated by a fuzzy set by the fuzzy engine unit into numerical values corresponding to the fuzzy values.

5. The apparatus of claim 4, wherein the preset fuzzy function is composed of values between probabilities of 0.95 and 0.99 of a chi-square distribution, and respective distribution values are 3.84 and 6.64.

6. The apparatus of claim 4, wherein the adjustment unit outputs values, obtained by multiplying the values output from the defuzzy function unit by the impact value output from the verification unit, as adjustment values.

7. A method for stabilizing an output sequence of a real random number generator, comprising:

performing, by a verification unit, a monobit test on random number values sampled by and output from a comparison unit, and calculating an impact value; and

adjusting, by an adjustment unit, a voltage of any one of a random number generation unit and the comparison unit using resulting values of the monobit test and the impact value.

8. The method of claim 7, wherein performing the monobit test and calculating the impact value comprises performing the monobit test using the following monobit test equation:

X=(n₀−

n₁)²/n

where X denotes calculation results of the monobit test, n₀ denotes a number of 0'"'"'s, denotes a number of 1'"'"'s, and n denotes a total number of bits.

9. The method of claim 8, wherein the impact value becomes a negative (−

) value when (n₀−

n₁) is greater than 0 in the monobit test equation, whereas the impact value becomes a positive (+) value when (n₀−

n₁) is less than 0.

10. The method of claim 7, wherein adjusting the voltage comprises:

fuzzifying the resulting values of the monobit test using a preset fuzzy function;

performing fuzzy inference by applying fuzzy values obtained from fuzzifying to a fuzzy rule; and

converting the fuzzy values indicated by a fuzzy set by the fuzzy inference into numerical values corresponding to the fuzzy values.

11. The method of claim 10, wherein the preset fuzzy function is composed of values between probabilities of 0.95 and 0.99 of a chi-square distribution, and respective distribution values are 3.84 and 6.64.

12. The method of claim 10, wherein adjusting the value further comprises outputting values, obtained by multiplying the numerical values by the impact value, as adjustment values.