SEMICONDUCTOR STRUCTURES AND METHODS FOR MULTI-DIMENSION OF NANOWIRE DIAMETER TO IMPROVE DRIVE CURRENT

• US 20150228775A1
• Filed: 02/10/2014
• Published: 08/13/2015
• Est. Priority Date: 02/10/2014
• Status: Active Application

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: COLINGE, JEAN-PIERRE, YU, TSUNG-HSING, LIU, CHIA-WEN, HSU, YEH
• Granted Patent: US 10,276,664 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 40/00 Manufacture or treatment of nanostructures
• CPC Class Codes: H01L 29/0676 oriented perpendicular or at an angle to a substrate
• CPC Class Codes: H01L 29/0873 Drain regions
• CPC Class Codes: H01L 29/1037 and non-planar channel resulting from the gate electrode disposition, e.g. within a trench, H01L29/42356
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/66439 with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor with an active layer made of a group 13/15 material H01L29/66469
• CPC Class Codes: H01L 29/775 with one dimensional charge carrier gas channel, e.g. quantum wire FET

Abstract

A semiconductor device having a channel formed from a nanowire with a multi-dimensional diameter is provided. The semiconductor device comprises a drain region formed on a semiconductor substrate. The semiconductor device further comprises a nanowire structure formed between a source region and the drain region. The nanowire structure has a first diameter section joined with a second diameter section. The first diameter section is coupled to the drain region and has a diameter greater than the diameter of the second diameter section. The second diameter section is coupled to the source region. The semiconductor device further comprises a gate region formed around the junction at which the first diameter section and the second diameter section are joined.

Claims

1. A semiconductor device comprising:

a drain region formed on a semiconductor substrate;

a nanowire structure formed between a source region and the drain region, the nanowire structure having a first diameter section joined with a second diameter section, the first diameter section being coupled to the drain region and having a diameter greater than the diameter of the second diameter section, the second diameter section coupled to the source region; and

a gate region formed around the junction at which the first diameter section and the second diameter section are joined.

2. The semiconductor device of claim 1, wherein the gate region comprises High-K dielectric material and metal gate material and wherein the High-K dielectric material is formed around the junction at which the first diameter section and the second diameter section are joined such that the circumference of the high-K material surrounding the second diameter section does not extend out as far as the circumference of the high-K material surrounding the first diameter section.

3. The semiconductor device of claim 2, wherein the High-K dielectric surrounding the second diameter section does not extend out as far as the circumference of the first diameter section.

4. The semiconductor device of claim 1, wherein the nanowire structure further comprises a third diameter section having a diameter smaller than the diameter of the second diameter section and coupled between the second diameter section and the source region.

5. The semiconductor device of claim 1, wherein the band gap energy of the first diameter section is less than the band gap energy of the second diameter section.

6. The semiconductor device of claim 1, wherein the diameter of the first diameter section is at least two times greater than the diameter of the second diameter section.

7. The semiconductor device of claim 1, wherein the length of the first diameter section is less than or equal to half of the channel length of the semiconductor device.

8. A method of fabricating a semiconductor device comprising:

forming a drain region on a semiconductor substrate;

forming a nanowire structure between the drain region and a source region, the nanowire structure having a first diameter section joined with a second diameter section, the first diameter section coupled to the drain region and having a diameter greater than the diameter of the second diameter section, the second diameter section coupled to the source region; and

forming a gate region around the junction at which the first diameter section and the second diameter section are joined.

9. The method of claim 8, wherein the nanowire structure further comprises a third diameter section having a diameter smaller than the diameter of the second diameter section and coupled between the second diameter section and the source region.

10. The method of claim 8, wherein the gate region comprises High-K dielectric material and metal gate material and wherein the High-K dielectric material is formed around the junction at which the first diameter section and the second diameter section are joined such that the circumference of the high-K material surrounding the second diameter section does not extend out as far as the circumference of the high-K material surrounding the first diameter section.

11. The method of claim 10, wherein the High-K dielectric surrounding the second diameter section does not extend out as far as the circumference of the first diameter section.

12. The method of claim 8, wherein the band gap energy of the first diameter section is less than the band gap energy of the second diameter section.

13. The method of claim 8, wherein the diameter of the first diameter section is at least two times greater than the diameter of the second diameter section.

14. The method of claim 8, wherein the length of the first diameter section is less than or equal to half of the channel length of the semiconductor device.

15. A nanowire structure for use as a channel in a semiconductor device, the nanowire structure comprising:

a first diameter section joined with a second diameter section, the first diameter section being coupled to a drain region in the semiconductor device and having a diameter greater than the diameter of the second diameter section,

the second diameter section coupled to a source region in the semiconductor device; and

wherein a gate region in the semiconductor device is formed around the junction at which the first diameter section and the second diameter section are joined.

16. The method of claim 15, wherein the nanowire structure further comprises a third diameter section having a diameter smaller than the diameter of the second diameter section.

17. The nanowire structure of claim 15, wherein the gate region comprises High-K dielectric material and metal gate material and wherein the High-K dielectric material is formed around the junction at which the first diameter section and the second diameter section are joined such that the circumference of the high-K material surrounding the second diameter section does not extend out as far as the circumference of the high-K material surrounding the first diameter section.

18. The nanowire structure of claim 15, wherein the band gap energy of the first diameter section is less than the band gap energy of the second diameter section.

19. The nanowire structure of claim 15, wherein the diameter of the first diameter section is at least two times greater than the diameter of the second diameter section.

20. The nanowire structure of claim 15, wherein the length of the first diameter section is less than or equal to half of the channel length of the semiconductor device.

21. A semiconductor device comprising:

a drain region formed on a semiconductor substrate;

a nanowire structure formed between the source region and a drain region, the nanowire structure having a tapered diameter section with a wider diameter section adjacent to one end and a narrower diameter section adjacent to another end, the wider diameter section being coupled to the drain region, the narrower diameter section coupled to the source region; and

a gate region formed around a central portion of the tapered diameter section.

22. A method of fabricating a semiconductor device comprising:

forming a drain region on a semiconductor substrate;

forming a nanowire structure between the drain region and a source region, the nanowire structure having a tapered diameter section with a wider diameter section adjacent to one end and a narrower diameter section adjacent to another end, the wider diameter section being coupled to the drain region, the narrower diameter section coupled to the source region; and

forming a gate region around a central portion of the tapered diameter section.