SEMICONDUCTOR DEVICE AND FORMATION THEREOF

• US 20150236114A1
• Filed: 02/17/2014
• Published: 08/20/2015
• Est. Priority Date: 02/17/2014
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Ching, Kuo-Cheng, Chen, Guan-Lin, Wang, Chao-Hsiung, Liu, Chi-Wen
• Granted Patent: US 9,837,537 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/845 including field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 27/1211 combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/401 Multistep manufacturing processes
• CPC Class Codes: H01L 29/41783 Raised source or drain electrodes self aligned with the gate
• CPC Class Codes: H01L 29/41791 for transistors with a horizontal current flow in a vertical sidewall, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

A semiconductor device and method of formation are provided herein. A semiconductor device includes a barrier including carbon over a fin, the fin including a doped region. The semiconductor device includes an epitaxial (Epi) cap over the barrier, the Epi cap including phosphorus. The barrier inhibits phosphorus diffusion from the Epi cap into the fin as compared to a device that lacks such a barrier. The inhibition of the phosphorus diffusion reduces a short channel effect, thus improving the semiconductor device function.

Claims

1. A semiconductor device comprising:

an epitaxial (Epi) cap over a fin, the Epi cap comprising phosphorus; and

a barrier between the fin and the Epi cap, the barrier comprising carbon.

2. The semiconductor device of claim 1, the Epi cap comprising at least one of a source or a drain.

3. The semiconductor device of claim 1, the barrier comprising at least one of silicon or phosphorus.

4. The semiconductor device of claim 1, the barrier comprising a first barrier layer and a second barrier layer.

5. The semiconductor device of claim 4, the first barrier layer over the second barrier layer, such that the second barrier layer is in contact with the fin and the first barrier layer is in contact with the Epi cap.

6. The semiconductor device of claim 5, the first barrier layer comprising silicon and carbon and the second barrier layer comprising silicon, carbon and phosphorus.

7. The semiconductor device of claim 1, the barrier having a carbon concentration between about 0.2% to about 3%.

8. The semiconductor device of claim 1, the barrier comprising phosphorous.

9. The semiconductor device of claim 1, the barrier comprising silicon.

10. The semiconductor device of claim 1, the barrier having a thickness between about 2 nm to about 25 nm.

11. The semiconductor device of claim 1, the fin comprising at least one of silicon, germanium or oxide.

12. The semiconductor device of claim 1, a gate adjacent the Epi cap and over a channel portion of the fin.

13. A method of forming a semiconductor device, comprising:

forming a barrier over a fin, the barrier comprising carbon; and

forming an epitaxial (Epi) cap over the barrier, such that the barrier is between the fin and the Epi cap, the Epi cap comprising phosphorus.

14. The method of claim 13, comprising forming a gate over a channel portion of the fin, prior to the forming a barrier and prior to the forming an Epi cap.

15. The method of claim 13, the forming a barrier comprising growing carbon and at least one of silicon or phosphorus over the fin.

16. The method of claim 13, the forming a barrier comprising growing a first barrier layer and a second barrier layer over the fin.

17. The method of claim 16, the growing a first barrier layer and a second barrier layer comprising growing the first barrier layer over the second barrier layer such that the second barrier layer is in contact with the fin and the first barrier layer is in contact with the Epi cap.

18. The method of claim 13, the forming an Epi cap comprising growing silicon and phosphorous.

19. A semiconductor device comprising:

a fin, the fin comprising at least one of silicon, germanium or oxide;

an epitaxial (Epi) cap over the fin, the Epi cap comprising silicon and phosphorus; and

a barrier between the fin and the Epi cap, the barrier comprising carbon and at least one of silicon or phosphorous.

20. The semiconductor device of claim 19, the barrier comprising at a first barrier layer and a second barrier layer.