HINT INSTRUCTION FOR MANAGING TRANSACTIONAL ABORTS IN TRANSACTIONAL MEMORY COMPUTING ENVIRONMENTS

• US 20150242208A1
• Filed: 02/27/2014
• Published: 08/27/2015
• Est. Priority Date: 02/27/2014
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Busaba, Fadi Y., Cain, Harold W. III, Greiner, Dan F., Gschwind, Michael Karl, Michael, Maged M., Salapura, Valentina, Shum, Chung-Lung K., Slegel, Timothy J.
• Granted Patent: US 9,361,041 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 9/268 Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs
• CPC Class Codes: G06F 9/467 Transactional memory G06F9/528 takes precedence
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
• CPC Class Codes: G06F 9/5083 Techniques for rebalancing the load in a distributed system
• CPC Class Codes: G06F 9/528 by using speculative mechanisms
• CPC Class Codes: G06F 9/542 Event management; Broadcasting; Multicasting; Notifications

Abstract

When executed, a transaction-hint instruction specifies a transaction-count-to-completion (CTC) value for a transaction. The CTC value indicates how far a transaction is from completion. The CTC may be a number of instructions to completion or an amount of time to completion. The CTC value is adjusted as the transaction progresses. When a disruptive event associated with inducing transactional aborts, such as an interrupt or a conflicting memory access, is identified while processing the transaction, processing of the disruptive event is deferred if the adjusted CTC value satisfies deferral criteria. If the adjusted CTC value does not satisfy deferral criteria, the transaction is aborted and the disruptive event is processed.

Claims

1. A method for processing transactions in a computing environment with transactional memory, the method comprising:

executing, by a processor, a transaction-hint instruction associated with a first transaction, the transaction-hint instruction specifying a transaction-count-to-completion (CTC) value, the CTC value indicating how far the first transaction is from completion;

adjusting, by the processor, the CTC value based on progress of the first transaction;

identifying, by the processor, a disruptive event while processing the first transaction, the disruptive event associated with inducing transactional aborts;

determining, by the processor, whether the adjusted CTC value satisfies deferral criteria; and

based on determining that the adjusted CTC value satisfies the deferral criteria, deferring processing of the disruptive event.

2. The method of claim 1, wherein the transaction-hint instruction is selected from the group consisting of:

an instructions-to-completion instruction, wherein the CTC value indicates an approximate number of instructions remaining to complete the first transaction;

a transaction-time-to-completion instruction, wherein the CTC value indicates an approximate amount of time remaining to complete the first transaction; and

a generic transaction-hint instruction, wherein an indicator flag in a mask field associated with the generic transaction-hint instruction determines whether the CTC value indicates an approximate number of instructions remaining to complete the first transaction or an approximate amount of time remaining to complete the first transaction.

3. The method of claim 1, wherein the disruptive event is selected from the group consisting of:

a pending asynchronous interrupt; and

a conflicting memory access between the first transaction and a second processor.

4. The method of claim 1, wherein the specified CTC value is based on at least one of an immediate value associated with the transaction-hint instruction, a register identifier associated with the transaction-hint instruction, and a memory address associated with the transaction-hint instruction.

5. The method of claim 1, wherein the transaction-hint instruction is executed before the processing of the first transaction begins.

6. A computer system for processing transactions in a computing environment with transactional memory, the computer system comprising:

a memory; and

a processor in communication with the memory, wherein the computer system is configured to perform a method, the method comprising;

executing, by the processor, a transaction-hint instruction associated with a first transaction, the transaction-hint instruction specifying a transaction-count-to-completion (CTC) value, the CTC value indicating how far the first transaction is from completion;

adjusting, by the processor, the CTC value based on progress of the first transaction;

identifying, by the processor, a disruptive event while processing the first transaction, the disruptive event associated with inducing transactional aborts;

determining, by the processor, whether the adjusted CTC value satisfies deferral criteria; and

based on determining that the adjusted CTC value satisfies the deferral criteria, deferring processing of the disruptive event.

7. The system of claim 6, wherein the transaction-hint instruction is selected from the group consisting of:

an instructions-to-completion instruction, wherein the CTC value indicates an approximate number of instructions remaining to complete the first transaction;

a transaction-time-to-completion instruction, wherein the CTC value indicates an approximate amount of time remaining to complete the first transaction; and

a generic transaction-hint instruction, wherein an indicator flag in a mask field associated with the generic transaction-hint instruction determines whether the CTC value indicates an approximate number of instructions remaining to complete the first transaction or an approximate amount of time remaining to complete the first transaction.

8. The system of claim 6, wherein the method further comprises:

determining whether a predetermined deferral delay has expired before a completion of the first transaction; and

based on determining that the predetermined deferral delay has expired before the completion of the first transaction, aborting the first transaction.

9. The system of claim 6, wherein the disruptive event is selected from the group consisting of:

a pending asynchronous interrupt; and

a conflicting memory access between the first transaction and a second processor.

10. The system of claim 6, wherein the adjusted CTC value satisfies the deferral criteria based on the adjusted CTC value and a predetermined threshold value.

11. The system of claim 6, wherein the specified CTC value is based on at least one of an immediate value associated with the transaction-hint instruction, a register identifier associated with the transaction-hint instruction, and a memory address associated with the transaction-hint instruction.

12. The system of claim 6, wherein the method further comprises:

executing a second transaction-hint instruction associated with the first transaction; and

adjusting the CTC value based on the executing the second transaction-hint instruction.

13. The system of claim 6, wherein the transaction-hint instruction is executed before the processing of the first transaction begins.

14. A computer program product for processing transactions in a computing environment with transactional memory, the computer program product comprising:

a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method, the method comprising;

executing, by the processing circuit, a transaction-hint instruction associated with a first transaction, the transaction-hint instruction specifying a transaction-count-to-completion (CTC) value, the CTC value indicating how far the first transaction is from completion;

adjusting, by the processing circuit, the CTC value based on progress of the first transaction;

identifying, by the processing circuit, a disruptive event while processing the first transaction, the disruptive event associated with inducing transactional aborts;

determining, by the processing circuit, whether the adjusted CTC value satisfies deferral criteria; and

based on determining that the adjusted CTC value satisfies the deferral criteria, deferring processing of the disruptive event.

15. The computer program product of claim 14, wherein the transaction-hint instruction is selected from the group consisting of:

an instructions-to-completion instruction, wherein the CTC value indicates an approximate number of instructions remaining to complete the first transaction;

a transaction-time-to-completion instruction, wherein the CTC value indicates an approximate amount of time remaining to complete the first transaction; and

a generic transaction-hint instruction, wherein an indicator flag in a mask field associated with the generic transaction-hint instruction determines whether the CTC value indicates an approximate number of instructions remaining to complete the first transaction or an approximate amount of time remaining to complete the first transaction.

16. The computer program product of claim 14, wherein the method further comprises:

determining whether a predetermined deferral delay has expired before a completion of the first transaction; and

based on determining that the predetermined deferral delay has expired before the completion of the first transaction, aborting the first transaction.

17. The computer program product of claim 14, wherein the disruptive event is selected from the group consisting of:

a pending asynchronous interrupt; and

a conflicting memory access between the first transaction and a second processor.

18. The computer program product of claim 14, wherein the specified CTC value is based on at least one of an immediate value associated with the transaction-hint instruction, a register identifier associated with the transaction-hint instruction, and a memory address associated with the transaction-hint instruction.

19. The computer program product of claim 14, wherein the method further comprises:

ignoring a second transaction-hint instruction associated with the first transaction after the identifying the disruptive event.

20. The computer program product of claim 14, wherein the transaction-hint instruction is executed before the processing of the first transaction begins.