NONVOLATILE MEMORY DEVICE HAVING VARIABLE RESISTANCE MEMORY CELLS AND A METHOD OF RESETTING SAME
First Claim
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1. A method of programming a variable resistance memory cell in a nonvolatile memory device, the method comprising:
- programming the variable resistance memory cell to one of a plurality of set states using a corresponding one of a plurality of compliance currents; and
thereafter,programming the variable resistance memory cell to a reset state by pre-reading the variable resistance memory cell to determine the resistance of the variable resistance memory cell, and resetting the variable resistance memory cell using a variable reset voltage determined in response to the determined resistance of the variable resistance memory cell.
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Abstract
A method of resetting a variable resistance memory cell in a nonvolatile memory device includes; programming the memory cell to a set state using a corresponding compliance current, and then programming the memory cell to a reset state by pre-reading the variable resistance memory cell to determine its resistance and resetting the memory cell using a variable reset voltage determined in response to the determined resistance.
17 Citations
20 Claims
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1. A method of programming a variable resistance memory cell in a nonvolatile memory device, the method comprising:
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programming the variable resistance memory cell to one of a plurality of set states using a corresponding one of a plurality of compliance currents; and
thereafter,programming the variable resistance memory cell to a reset state by pre-reading the variable resistance memory cell to determine the resistance of the variable resistance memory cell, and resetting the variable resistance memory cell using a variable reset voltage determined in response to the determined resistance of the variable resistance memory cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of programming a variable resistance memory cell in a nonvolatile memory device, the method comprising:
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programming the variable resistance memory cell to one of a plurality of set states using a corresponding one of a plurality of compliance currents; and
thereafter,programming the variable resistance memory cell to a reset state by first programming the variable resistance memory cell to a strong set state and then resetting the variable resistance memory cell to the reset state from the strong set state using a constant reset voltage. - View Dependent Claims (11, 12)
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13. A method of programming a variable resistance memory cell in a nonvolatile memory device, the method comprising:
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programming the variable resistance memory cell to one of a plurality of set states using a corresponding one of a plurality of compliance currents; and
thereafter,programming the variable resistance memory cell to a reset state by pre-reading the variable resistance memory cell to determine the resistance of the variable resistance memory cell, programming the variable resistance memory cell to a strong set state and then resetting the variable resistance memory cell to the reset state from the strong set state using a constant reset voltage. - View Dependent Claims (14, 17, 18, 19, 20)
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15. The method of claim 15, wherein the plurality of set states comprises a first set state indicated by a first resistance range, a second set state indicated by a second resistance range greater than the first resistance range, and a third set state indicated by a third resistance range greater than the second resistance range.
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16. The method of claim 16, wherein the variable resistance memory cell is programmed to the first set state using a first compliance current, the variable resistance memory cell is programmed to the second set state using a second compliance current greater than the first compliance current, and the variable resistance memory cell is programmed to the third set state using a third compliance current greater than the second compliance current.
Specification